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Contents

README

markdown

CS2N65A5

SEP · MOSFETs · TO-252

CS2N65A5 from SEP, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage rated ±30 V, threshold VGS(th) 2 V min to 4 V max at ID = 250 µA.
2 D passive Drain (center lead is trimmed on TO-252, drain connects via the mounting tab); VDS rated 650 V and continuous ID 2 A.
3 S passive Source; body-diode continuous current IS up to 2 A and pulsed 8 A.

Key specifications

Parameter Value
Manufacturer SEP
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 650 V VGS = 0 V, ID = 250 µA 2
Drain-Source Leakage Current IDS 1 µA VDS = 650 V, VGS = 0 V 2
Gate Leakage Current IGSS -100 100 nA VGS = ± 30V, VDS = 0 V 2
Gate-Source Threshold Voltage VGS(th) 2 3 4 V VGS = VGS, ID = 250 µA 2
Drain-Source On-State Resistance RDS(on) 4.2 5 Ω VGS = 10 V, ID = 1 A 2
Source-Drain Diode Forward Voltage VFSD 1.2 V VGS = 0 V, IS = 1 A 2
Input Capacitance Ciss 270 350 pF VDS = 25V, VGS = 0 V, f = 1 MHz 2
Output Capacitance Coss 40 50 pF 2
Reverse Transfer Capacitance Crss 5 7 pF 2
Turn-on Delay Time td(ON) 10 30 ns ID = 2.4 A, VDD = 300 V, RG= 25 Ω 2
Rise Time tr 25 60 ns 2
Turn-Off Delay Time td(OFF) 20 50 ns 2
Fall Time tf 25 60 ns 2
Total Gate Charge QG 9 11 nC ID = 2.4 A, VDS = 480V, VGS = 10 V 2
Maximum Body-Diode Continuous Current IS 2 A 2
Maximum Body-Diode Pulsed Current ISM 8 A 2
Drain-Source Diode Forward Voltage VSD 1.4 V ISD = 2.0A, VGS = 0 V 2
Drain-Source Voltage VDS 650 V 2
Gate-Source Voltage VGS -30 30 V 2
Continuous Drain Current ID 2 A 2
Pulsed Drain Current IDM 8 A Pulse test: 300 µs pulse width, 2 % duty cycle (Note1) 2
Single Pulse Avalanche Energy EAS 140 mJ Note1: pulse test: 300 µs pulse width, 2 % duty cycle 2
Operating Temperature Range TJ 150 °C 2
Storage Temperature Range TSTG -55 150 °C 2
Thermal Resistance, Junction to Case RθJC 2.87 °C/W TO-251/252 column 2
Thermal Resistance, Junction to Ambient RθJA 50 °C/W TO-251/252 column 2

CAD (KiCad official)

  • Symbol: CS2N65A5
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: cs2n65a5-etched.step / cs2n65a5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cs2n65a5.step / cs2n65a5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SEP datasheet (4 pp, sha256 49d3b1e28c49c005, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF