component
CS2100CP-CZZR
Public Made by Adomby adom
Cirrus Logic Clock Generators, PLLs, Frequency Synthesizers, MSOP-10. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
cs2100cp-czzr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
71671f0
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{
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"type": "component",
"slug": "cs2100cp-czzr",
"title": "CS2100CP-CZZR",
"brief": "Cirrus Logic Clock Generators, PLLs, Frequency Synthesizers, MSOP-10. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
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"manufacturer": "Cirrus Logic",
"package": "MSOP-10",
"pin_count": 10,
"category": "Clock/Timing",
"subcategory": "Clock Generators, PLLs, Frequency Synthesizers",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907254023774208",
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"pins": [
{
"number": "1",
"name": "VD",
"type": "power_in",
"description": "Digital Power. Positive 3.3 V power supply for the digital and analog sections. Requires local decoupling (typ. 0.1 uF + 1 uF to GND)."
},
{
"number": "2",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "3",
"name": "CLK_OUT",
"type": "output",
"description": "PLL Clock Output. Buffered low-jitter clock output, 6 to 75 MHz range, driven by the fractional-N synthesizer."
},
{
"number": "4",
"name": "AUX_OUT",
"type": "output",
"description": "Auxiliary Output. Outputs a buffered version of one of the input or output clocks, or a status signal (e.g. PLL lock indicator), depending on register configuration."
},
{
"number": "5",
"name": "CLK_IN",
"type": "input",
"description": "Frequency Reference Clock Input to the Digital PLL. Accepts 50 Hz to 30 MHz reference clock for the output-to-input ratio tracking."
},
{
"number": "6",
"name": "XTO",
"type": "output",
"description": "Crystal Oscillator Output. Pair with XTI to connect an external crystal (8-75 MHz) used as the low-jitter timing reference; leave N.C. when using an external REF_CLK on pin 7."
},
{
"number": "7",
"name": "XTI/REF_CLK",
"type": "input",
"description": "Muxed Crystal Input / External Reference Clock Input. XTI is the crystal I/O pin (with XTO) for an external crystal; REF_CLK is the input for an externally generated low-jitter timing reference clock (8-75 MHz)."
},
{
"number": "8",
"name": "AD0/CS",
"type": "input",
"description": "Muxed Address Bit 0 (I2C mode) / Control Port Chip Select (SPI mode). AD0 selects the I2C device address LSB when using I2C; CS (active low) enables the serial port when using SPI."
},
{
"number": "9",
"name": "SCL/CCLK",
"type": "input",
"description": "Control Port Clock. Serial clock for both the I2C (SCL) and SPI (CCLK) control interfaces."
},
{
"number": "10",
"name": "SDA/CDIN",
"type": "bidirectional",
"description": "Serial Control Data. SDA is the bidirectional data line in I2C mode; CDIN is the input data line in SPI mode."
}
],
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"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 10,
"described": 10,
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}
},
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"seat": "z = 0",
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"sha256": "b8f88eac3ce221c2ccb0b5048f9ad49c2ef4af148f8ae50c4e232e357683f547",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
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"role": "eda",
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}
]
},
"metadata": {
"specs": {
"Manufacturer": "Cirrus Logic",
"Package": "MSOP-10",
"Category": "Clock/Timing",
"Pins": "10"
}
},
"variants": [
{
"mpn": "CS2100CP-CZZR",
"kind": "packaging"
},
{
"mpn": "CS2100CP-CZZRDZZ",
"kind": "packaging"
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{
"mpn": "CS2100CP-CZZRDZZR",
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{
"mpn": "CS2100CP-CZZREZZ",
"kind": "packaging"
},
{
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"sections": [
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"discovery_triggers": [
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"discovery_pitch": "CS2100CP-CZZR (Cirrus Logic) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
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},
"files": [
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"updated_at": "2026-09-24T19:33:11.214Z"
}