main
Ray cs2100cp-czzr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 71671f0
{
  "schema_version": 1,
  "type": "component",
  "slug": "cs2100cp-czzr",
  "title": "CS2100CP-CZZR",
  "brief": "Cirrus Logic Clock Generators, PLLs, Frequency Synthesizers, MSOP-10. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "clock-timing",
    "cs2100cp-czzr"
  ],
  "component": {
    "mpn": "CS2100CP-CZZR",
    "manufacturer": "Cirrus Logic",
    "package": "MSOP-10",
    "pin_count": 10,
    "category": "Clock/Timing",
    "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907254023774208",
    "parts": {
      "symbol": "cs2100cp-czzr.kicad_sym",
      "footprint": "cs2100cp-czzr.kicad_mod",
      "model_3d": "cs2100cp-czzr-etched.glb",
      "model_3d_plain": "cs2100cp-czzr.glb",
      "model_3d_step": "cs2100cp-czzr-etched.step",
      "model_3d_step_plain": "cs2100cp-czzr.step",
      "lbr": "cs2100cp-czzr.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "VD",
        "type": "power_in",
        "description": "Digital Power. Positive 3.3 V power supply for the digital and analog sections. Requires local decoupling (typ. 0.1 uF + 1 uF to GND)."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device."
      },
      {
        "number": "3",
        "name": "CLK_OUT",
        "type": "output",
        "description": "PLL Clock Output. Buffered low-jitter clock output, 6 to 75 MHz range, driven by the fractional-N synthesizer."
      },
      {
        "number": "4",
        "name": "AUX_OUT",
        "type": "output",
        "description": "Auxiliary Output. Outputs a buffered version of one of the input or output clocks, or a status signal (e.g. PLL lock indicator), depending on register configuration."
      },
      {
        "number": "5",
        "name": "CLK_IN",
        "type": "input",
        "description": "Frequency Reference Clock Input to the Digital PLL. Accepts 50 Hz to 30 MHz reference clock for the output-to-input ratio tracking."
      },
      {
        "number": "6",
        "name": "XTO",
        "type": "output",
        "description": "Crystal Oscillator Output. Pair with XTI to connect an external crystal (8-75 MHz) used as the low-jitter timing reference; leave N.C. when using an external REF_CLK on pin 7."
      },
      {
        "number": "7",
        "name": "XTI/REF_CLK",
        "type": "input",
        "description": "Muxed Crystal Input / External Reference Clock Input. XTI is the crystal I/O pin (with XTO) for an external crystal; REF_CLK is the input for an externally generated low-jitter timing reference clock (8-75 MHz)."
      },
      {
        "number": "8",
        "name": "AD0/CS",
        "type": "input",
        "description": "Muxed Address Bit 0 (I2C mode) / Control Port Chip Select (SPI mode). AD0 selects the I2C device address LSB when using I2C; CS (active low) enables the serial port when using SPI."
      },
      {
        "number": "9",
        "name": "SCL/CCLK",
        "type": "input",
        "description": "Control Port Clock. Serial clock for both the I2C (SCL) and SPI (CCLK) control interfaces."
      },
      {
        "number": "10",
        "name": "SDA/CDIN",
        "type": "bidirectional",
        "description": "Serial Control Data. SDA is the bidirectional data line in I2C mode; CDIN is the input data line in SPI mode."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907254023774208",
        "pages": 33,
        "sha256": "dc2432ea2b460da2",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 10,
        "described": 10,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cs2100cp-czzr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.9,
          3,
          1.1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "b8f88eac3ce221c2ccb0b5048f9ad49c2ef4af148f8ae50c4e232e357683f547",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cs2100cp-czzr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.9,
          3,
          1.1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "b0b7de9e239980bf16399a0c39ceeec6c381a6b96ee3bc096b54eee2075f330d",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Cirrus Logic",
      "Package": "MSOP-10",
      "Category": "Clock/Timing",
      "Pins": "10"
    }
  },
  "variants": [
    {
      "mpn": "CS2100CP-CZZR",
      "kind": "packaging"
    },
    {
      "mpn": "CS2100CP-CZZRDZZ",
      "kind": "packaging"
    },
    {
      "mpn": "CS2100CP-CZZRDZZR",
      "kind": "packaging"
    },
    {
      "mpn": "CS2100CP-CZZREZZ",
      "kind": "packaging"
    },
    {
      "mpn": "CS2100CP-CZZREZZR",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cs2100cp-czzr"
  ],
  "discovery_pitch": "CS2100CP-CZZR (Cirrus Logic) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cs2100cp-czzr.kicad_sym",
    "cs2100cp-czzr.kicad_mod",
    "cs2100cp-czzr.glb",
    "cs2100cp-czzr.step",
    "cs2100cp-czzr.lbr",
    "docs/hero.png",
    "docs/cs2100cp-czzr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T19:33:11.214Z"
}