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CS1668

Wuxi I-core Elec · LED Drivers · SOP-24

CS1668 from Wuxi I-core Elec, in a SOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIO bidirectional Serial data I/O with N-channel open-drain output and built-in pull-up resistor.
2 CLK input Serial clock input.
3 STB input Chip select (strobe) input.
4 K1 input Key input with built-in pull-down resistor (typ. 10 kΩ).
5 K2 input Key input with built-in pull-down resistor (typ. 10 kΩ).
6 VDD power_in Power supply, 3 to 5.5 V recommended (absolute max -0.5 to +7.0 V).
7 SEG1/KS1 output Segment output / key scan output, P-channel open-drain.
8 SEG2/KS2 output Segment output / key scan output, P-channel open-drain.
9 SEG3/KS3 output Segment output / key scan output, P-channel open-drain.
10 SEG4/KS4 output Segment output / key scan output, P-channel open-drain.
11 SEG5/KS5 output Segment output / key scan output, P-channel open-drain.
12 SEG6/KS6 output Segment output / key scan output, P-channel open-drain.
13 SEG7/KS7 output Segment output / key scan output, P-channel open-drain.
14 SEG8/KS8 output Segment output / key scan output, P-channel open-drain.
15 SEG9/KS9 output Segment output / key scan output, P-channel open-drain.
16 SEG10/KS10 output Segment output / key scan output, P-channel open-drain.
17 SEG12/GRID7 output Segment/grid multiplexed output, P/N-channel open-drain.
18 SEG13/GRID6 output Segment/grid multiplexed output, P/N-channel open-drain.
19 SEG14/GRID5 output Segment/grid multiplexed output, P/N-channel open-drain.
20 GRID4 output Grid output, N-channel open-drain.
21 GRID3 output Grid output, N-channel open-drain.
22 GND power_in Ground.
23 GRID2 output Grid output, N-channel open-drain.
24 GRID1 output Grid output, N-channel open-drain.

Key specifications

Parameter Value
Manufacturer Wuxi I-core Elec
Package SOP-24
Category Nixie Tube Driver/LED Driver
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output high drive current 1 IOH1 20 40 60 mA SEG1~SEG14, VOH=VDD-2V 4
Output high drive current 2 IOH2 40 60 80 mA SEG1~SEG14, VOH=VDD-3V 4
Output low drive current (GRID) IOL1 80 100 mA GRID1~GRID7, VOL=0.3V 4
DIO output low current IDO 4 8 mA VOL=0.4V, DIO 4
High-level output current tolerance ITOLSG 5 % VOL=VDD-3V, SEG1~SEG14 4
Input leakage current (VIN=VDD) II -1 1 uA VIN=VDD, STB, CLK, DIO 4
Input leakage current (VIN=GND, STB/CLK) II -1 1 uA VIN=GND, STB, CLK 4
Input leakage current (VIN=GND, DIO) II 100 150 200 uA VIN=GND, DIO 4
Input high voltage VIH 0.7 V CLK, DIO, STB; min printed as 0.7VDD 4
Input low voltage VIL 0.2 V CLK, DIO, STB; max printed as 0.2VDD 4
Quiescent current IDD 110 130 150 uA No load, VIN=VDD 4
Input pull-down resistance RL 10 KΩ K1~K2 4
Propagation delay CLK to DIO (tPLZ) tPLZ 300 ns CLK→DIO, CL=15pF, RL=10KΩ 4
Propagation delay CLK to DIO (tPZL) tPZL 100 ns CLK→DIO, CL=15pF, RL=10KΩ 4
Rise time SEG tTZH1 2 us CL=300pF, SEG1~SEG14 4
Rise time GRID tTZH 0.5 us CL=300pF, GRID1~GRID7 4
Fall time tTHZ 120 us CL=300pF, SEGn, GRIDn 4
Maximum clock frequency Fmax 1 MHz Duty cycle 50% 4
Oscillation frequency fOSC 400 KHz VDD=4.5~5.5V 4
Clock pulse width PWCLK 400 ns 5
Strobe pulse width PWSTB 1 μs 5
Data setup time tSETUP 100 ns 5
Data hold time tHOLD 100 ns 5
CLK to STB time tCLK-STB 1 μs CLK↑→STB↑ 5
Wait time tWAIT 1 μs CLK↑→CLK↓ 5
Logic supply voltage VDD 3 5 5.5 V 4
High-level input voltage VIH 0.7 1 V Printed as 0.7VDD to VDD 4
Low-level input voltage VIL 0 0.2 V Printed as 0 to 0.2VDD 4
Supply voltage VDD -0.5 7 V Ta=25℃, GND=0V 3
Logic input voltage VIN -0.5 0.5 V Printed as -0.5 to VDD+0.5 3
Output high drive (SEG) IO1 -50 mA Ta=25℃ 3
Output low drive (GRID) IO2 150 mA Ta=25℃ 3
Operating temperature Topt -40 85 ℃ 3
Storage temperature Tstg -65 150 ℃ 4
Soldering temperature TL 250 ℃ 10 seconds 4

CAD (KiCad official)

  • Symbol: CS1668
  • Footprint: Package_SO:SOP-24_7.5x15.4mm_P1.27mm
  • 3D model: SOP-24, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: cs1668-etched.step / cs1668-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cs1668.step / cs1668.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I-core Elec datasheet (15 pp, sha256 bb2ebf719da82ccc, retrieved 2026-10-30, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF