component
CS1237-SO
Public Made by Adomby adom
CHIPSEA Analog To Digital Converters (ADC), SOP-8-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 9d ago |
| viewers | 9d ago |
| cs1237-so-etched.glb | 9d ago |
| cs1237-so-etched.step | 9d ago |
| cs1237-so-hero.glb | 9d ago |
| cs1237-so-hero.overlay.json | 9d ago |
| cs1237-so.glb | 9d ago |
| cs1237-so.kicad_mod | 9d ago |
| cs1237-so.kicad_sym | 9d ago |
| cs1237-so.lbr | 9d ago |
| cs1237-so.step | 9d ago |
| package.json | 9d ago |
| page.json | 9d ago |
| README.md | 9d ago |
CS1237-SO
CHIPSEA · Analog To Digital Converters (ADC) · SOP-8-150mil
CS1237-SO from CHIPSEA, in a SOP-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REFIN | input | External reference input, which must be used with the internal reference turned off (REFO_OFF=1) and must be between 1.5 V and VDD+0.1 V. |
| 2 | GND | power_in | Chip ground (analog and digital ground reference for the device). |
| 3 | AINN | input | Negative differential analog input; the differential full-scale input is ±0.5VREF/PGA (AINP minus AINN). |
| 4 | AINP | input | Positive differential analog input; with PGA=64 or 128 the input common-mode range is GND+0.75 V to VDD-0.75 V. |
| 5 | SCLK | input | SPI serial clock input, maximum 1.1 MHz, which must be clean with rise and fall times under 50 ns; holding it high for more than 100 µs enters power-down mode. |
| 6 | DRDY/DOUT | bidirectional | SPI data-ready flag, data output (MSB first), and register write/read data pin; it is driven low when new conversion data is ready. |
| 7 | VDD | power_in | Power supply, rated 4.5 V to 5.5 V for 5 V operation or 3 V to 3.6 V for 3.3 V operation, with an absolute maximum of 6 V. |
| 8 | REFOUT | output | Internal reference output that also serves as the sensor excitation output, equal to VDD; it can be switched off via the REFO_OFF register bit. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CHIPSEA |
| Package | SOP-8-150mil |
| Category | Data Acquisition |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 电源电压 | VDD | -0.3 | 6 | V | 7 | ||
| 电源瞬间电流 | 100 | mA | 7 | ||||
| 电源恒定电流 | 10 | mA | 7 | ||||
| 节温 | 150 | ℃ | 7 | ||||
| 工作温度 | -40 | 85 | ℃ | 7 | |||
| 储存温度 | -60 | 150 | ℃ | 7 | |||
| 芯片管脚焊接温度 | 240 | ℃ | 7 | ||||
| 输入高电平漏电流 IIH | IIH | 10 | μA | VI=DVDD | 7 | ||
| 输入低电平漏电流 IIL | IIL | -10 | μA | VI=DGND | 7 | ||
| 串口时钟SCLK工作频率 | 1.1 | MHz | 7 | ||||
| AD速率 | 10 | 1280 | Hz | 8 | |||
| 积分线性度 | -15 | 15 | ppm | PGA=128 | 8 | ||
| 失调误差 | -1.4 | 1.4 | μV | PGA=128 | 8 | ||
| 增益误差 | -0.5 | 0.5 | % | PGA=128 | 8 | ||
| 参考电压输入 REFIN | 1.5 | V | 8 | ||||
| 温度测量误差 | TempError | -3 | 3 | ℃ | 8 | ||
| 电源电压 (5V系统) | VDD | 4.5 | 5 | 5.5 | V | VDD=5V | 8 |
| 电源电压 (3.3V系统) | VDD | 3 | 3.3 | 3.6 | V | VDD=3.3V | 8 |
CAD (KiCad official)
- Symbol:
CS1237-SO - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8-150mil (KiCad packages3D, STEP)
- 3D model files:
cs1237-so-etched.step/cs1237-so-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cs1237-so.step/cs1237-so.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: CHIPSEA datasheet (19 pp, sha256
3c682b95f2d9f96e, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).