component
CS1180
Public Made by Adomby adom
CHIPSEA Analog To Digital Converters (ADC), SSOP-16-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "cs1180",
"version": "0.1.0",
"type": "component",
"description": "CHIPSEA Analog To Digital Converters (ADC), SSOP-16-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"data acquisition",
"cs1180",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cs1180.kicad_sym",
"cs1180.kicad_mod",
"cs1180.glb",
"cs1180.step",
"cs1180.lbr",
"docs/hero.png",
"docs/cs1180-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cs1180-hero.glb",
"cs1180-hero.overlay.json",
"cs1180-etched.glb"
],
"component": {
"mpn": "CS1180",
"manufacturer": "CHIPSEA",
"package": "SSOP-16-208mil",
"pin_count": 16,
"category": "Data Acquisition",
"subcategory": "Analog To Digital Converters (ADC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588882140196425728",
"parts": {
"symbol": "cs1180.kicad_sym",
"footprint": "cs1180.kicad_mod",
"model_3d": "cs1180-hero.glb",
"model_3d_plain": "cs1180-etched.glb",
"model_3d_step": "cs1180-etched.step",
"model_3d_step_plain": "cs1180.step",
"lbr": "cs1180.lbr"
},
"distributor_links": {
"lcsc": "C44524"
},
"distributor_check": {
"checked_at": "2026-10-18T23:54:23Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "DGND",
"type": "power_in",
"description": "Digital ground pin for the CS1180 digital section."
},
{
"number": "2",
"name": "MCLK",
"type": "input",
"description": "Master clock input for 1-10 MHz; an external clock is applied here, and when a crystal is used 10-20 pF capacitors are required on MCLK and XTAL."
},
{
"number": "3",
"name": "XTAL",
"type": "passive",
"description": "Crystal driver pin, requiring a 10-20 pF load capacitor to MCLK when a crystal is used, and left floating when an external clock is driven into MCLK."
},
{
"number": "4",
"name": "DGND",
"type": "power_in",
"description": "Digital ground pin for the CS1180 digital section."
},
{
"number": "5",
"name": "REFP",
"type": "input",
"description": "Positive analog reference voltage input; the reference VREF=REFP−REFN must not exceed the chip supply voltage."
},
{
"number": "6",
"name": "REFN",
"type": "input",
"description": "Negative analog reference voltage input paired with REFP to form VREF, which must not exceed the chip supply voltage."
},
{
"number": "7",
"name": "AIN0",
"type": "input",
"description": "Positive analog input (AIN+) of the differential input; with the input buffer off the input range is AGND−0.1 V to AVDD+0.1 V."
},
{
"number": "8",
"name": "AIN1",
"type": "input",
"description": "Negative analog input (AIN−) of the differential input, with full-scale defined as (AIN+)−(AIN−)."
},
{
"number": "9",
"name": "AGND",
"type": "power_in",
"description": "Analog ground pin for the CS1180 analog section."
},
{
"number": "10",
"name": "AVDD",
"type": "power_in",
"description": "Analog supply voltage, specified at 2.7 V to 5.25 V; absolute maximum AVDD to AGND is 6 V."
},
{
"number": "11",
"name": "CS",
"type": "input",
"description": "Chip select, active low; it must be held low for the whole communication, and the SPI bus is reset when CS goes high."
},
{
"number": "12",
"name": "SDI",
"type": "input",
"description": "Serial data input for the SPI slave interface, sampled on SCLK edges."
},
{
"number": "13",
"name": "SDO",
"type": "tri_state",
"description": "Serial data output for the SPI slave interface, which is high impedance when not in use so SDI and SDO can be tied together as a bidirectional bus."
},
{
"number": "14",
"name": "SCLK",
"type": "input",
"description": "Serial clock input with Schmitt-trigger input used to sample SDI and SDO, which must be kept clean to avoid sampling errors."
},
{
"number": "15",
"name": "DRDY",
"type": "output",
"description": "Data ready output, active low, which goes low when new conversion data is available in the DOR register."
},
{
"number": "16",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply voltage, specified at 2.7 V to 5.25 V."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet text does not state a 208 mil body width. Section 6.1 only says 'SSOP16' with a dimens; The 16-pin pinout (Figure 2 and Table 3, page 9) is not tied to a specific package in the text. Sect; Pin type for XTAL was chosen as passive because the datasheet calls it a crystal driver pin and give"
],
"pages_sent": 30,
"cost_usd": 0.0897,
"at": "2026-10-18T23:54:09"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588882140196425728",
"pages": 30,
"sha256": "5eb0593f504c446f",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cs1180.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.8,
6.2,
2.1
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "d0e11e46aeca5dbaa5c4bb538f3f4899761267cabdeba6486325ae9e979c03ef",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cs1180-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.8,
6.2,
2.1
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "0e3b69ccc7de4cbd3981cbf26f65c4fca2e79fc83a4dfd7816638aa5b629ff28",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}