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CRSM038N10N4
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CRMICRO MOSFETs, DFN-8(5x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CRSM038N10N4
CRMICRO · MOSFETs · DFN-8(5x6)
CRSM038N10N4 from CRMICRO, in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source pin 1 (S1 in the package view); source terminal, with VDS rated 100V and continuous ID of 100A at TC=25°C. |
| 2 | S | passive | Source pin 2 (S2 in the package view); source terminal, tied to the same source as pins 1 and 3. |
| 3 | S | passive | Source pin 3 (S3 in the package view); source terminal, tied to the same source as pins 1 and 2. |
| 4 | G | input | Gate pin (G4 in the package view); gate-source voltage limited to ±20V, with a typical threshold VGS(th) of 3V at ID=250uA. |
| 5 | D | passive | Drain pin 5 (D5 in the package view); drain terminal, connected to the exposed drain pad, with VDS rated 100V. |
| 6 | D | passive | Drain pin 6 (D6 in the package view); drain terminal, connected to the exposed drain pad. |
| 7 | D | passive | Drain pin 7 (D7 in the package view); drain terminal, connected to the exposed drain pad. |
| 8 | D | passive | Drain pin 8 (D8 in the package view); drain terminal, connected to the exposed drain pad, with pulsed drain current up to 400A. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CRMICRO |
| Package | DFN-8(5x6) |
| Category | Transistors/Thyristors |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
CRSM038N10N4 - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
- 3D model files:
crsm038n10n4-etched.step/crsm038n10n4-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);crsm038n10n4.step/crsm038n10n4.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: CRMICRO datasheet (10 pp, sha256
93900c458403693e, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CRSM038N10N4
**CRMICRO** · MOSFETs · DFN-8(5x6)
CRSM038N10N4 from CRMICRO, in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source pin 1 (S1 in the package view); source terminal, with VDS rated 100V and continuous ID of 100A at TC=25°C. |
| 2 | S | passive | Source pin 2 (S2 in the package view); source terminal, tied to the same source as pins 1 and 3. |
| 3 | S | passive | Source pin 3 (S3 in the package view); source terminal, tied to the same source as pins 1 and 2. |
| 4 | G | input | Gate pin (G4 in the package view); gate-source voltage limited to ±20V, with a typical threshold VGS(th) of 3V at ID=250uA. |
| 5 | D | passive | Drain pin 5 (D5 in the package view); drain terminal, connected to the exposed drain pad, with VDS rated 100V. |
| 6 | D | passive | Drain pin 6 (D6 in the package view); drain terminal, connected to the exposed drain pad. |
| 7 | D | passive | Drain pin 7 (D7 in the package view); drain terminal, connected to the exposed drain pad. |
| 8 | D | passive | Drain pin 8 (D8 in the package view); drain terminal, connected to the exposed drain pad, with pulsed drain current up to 400A. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CRMICRO |
| Package | DFN-8(5x6) |
| Category | Transistors/Thyristors |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `CRSM038N10N4`
- Footprint: `Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm`
- 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
- 3D model files: `crsm038n10n4-etched.step` / `crsm038n10n4-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `crsm038n10n4.step` / `crsm038n10n4.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [CRMICRO datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835678935912448) (10 pp, sha256 `93900c458403693e`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/crsm038n10n4-datasheet.pdf)