component
CRSE120N10L2
Public Made by Adomby adom
CRMICRO MOSFETs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
CRSE120N10L2
CRMICRO · MOSFETs · SOIC-8
CRSE120N10L2 from CRMICRO, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the N-channel MOSFET, tied to pins 2 and 3, with continuous drain current rated 11 A at TA = 25°C. |
| 2 | S | passive | Source terminal of the N-channel MOSFET, tied to pins 1 and 3, with continuous drain current rated 11 A at TA = 25°C. |
| 3 | S | passive | Source terminal of the N-channel MOSFET, tied to pins 1 and 2, with continuous drain current rated 11 A at TA = 25°C. |
| 4 | G | input | Gate terminal of the MOSFET with a maximum gate-source voltage of ±20 V. |
| 5 | D | passive | Drain terminal, tied to pins 6, 7 and 8, with a drain-source voltage rating of 100 V and 11 A continuous current at TA = 25°C. |
| 6 | D | passive | Drain terminal, tied to pins 5, 7 and 8, with a drain-source voltage rating of 100 V and 11 A continuous current at TA = 25°C. |
| 7 | D | passive | Drain terminal, tied to pins 5, 6 and 8, with a drain-source voltage rating of 100 V and 11 A continuous current at TA = 25°C. |
| 8 | D | passive | Drain terminal, tied to pins 5, 6 and 7, with a drain-source voltage rating of 100 V and 11 A continuous current at TA = 25°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CRMICRO |
| Package | SOIC-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
CRSE120N10L2 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
crse120n10l2-etched.step/crse120n10l2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);crse120n10l2.step/crse120n10l2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: CRMICRO datasheet (10 pp, sha256
258c1e96f28dae65, retrieved 2026-11-02, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CRSE120N10L2
**CRMICRO** · MOSFETs · SOIC-8
CRSE120N10L2 from CRMICRO, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the N-channel MOSFET, tied to pins 2 and 3, with continuous drain current rated 11 A at TA = 25°C. |
| 2 | S | passive | Source terminal of the N-channel MOSFET, tied to pins 1 and 3, with continuous drain current rated 11 A at TA = 25°C. |
| 3 | S | passive | Source terminal of the N-channel MOSFET, tied to pins 1 and 2, with continuous drain current rated 11 A at TA = 25°C. |
| 4 | G | input | Gate terminal of the MOSFET with a maximum gate-source voltage of ±20 V. |
| 5 | D | passive | Drain terminal, tied to pins 6, 7 and 8, with a drain-source voltage rating of 100 V and 11 A continuous current at TA = 25°C. |
| 6 | D | passive | Drain terminal, tied to pins 5, 7 and 8, with a drain-source voltage rating of 100 V and 11 A continuous current at TA = 25°C. |
| 7 | D | passive | Drain terminal, tied to pins 5, 6 and 8, with a drain-source voltage rating of 100 V and 11 A continuous current at TA = 25°C. |
| 8 | D | passive | Drain terminal, tied to pins 5, 6 and 7, with a drain-source voltage rating of 100 V and 11 A continuous current at TA = 25°C. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CRMICRO |
| Package | SOIC-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `CRSE120N10L2`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `crse120n10l2-etched.step` / `crse120n10l2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `crse120n10l2.step` / `crse120n10l2.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [CRMICRO datasheet](docs/crse120n10l2-datasheet.pdf) (10 pp, sha256 `258c1e96f28dae65`, retrieved 2026-11-02, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/crse120n10l2-datasheet.pdf)