component
CRG40T65AN5H
Public Made by Adomby adom
CRMICRO IGBT Transistors / Modules, TO-3PN. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCRG40T65AN5H
CRMICRO · IGBT Transistors / Modules · TO-3PN
CRG40T65AN5H from CRMICRO, in a TO-3PN. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-emitter voltage is rated at ±20V DC and ±30V transient (tp≤10μs, D<0.01), with VGE(th) 3.5V min to 6.5V max at IC=250μA. |
| 2 | C | passive | Collector (also connected to the mounting tab per the package drawing); VCES is 650V with 40A DC collector current at TC=100℃. |
| 3 | E | passive | Emitter, which is also the anti-parallel diode anode; diode DC forward current is 40A at TC=25℃. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CRMICRO |
| Package | TO-3PN |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-emitter voltage (DC) | VCES | 650 | V | 2 | |||
| Gate-emitter voltage (DC) | VGES | -20 | 20 | V | 2 | ||
| Gate-emitter voltage (transient) | VGES | -30 | 30 | V | tp≤10μs, D<0.01 | 2 | |
| Collector DC current | IC | 80 | A | TC=25℃ | 2 | ||
| Collector DC current | IC | 40 | A | TC=100℃ | 2 | ||
| Pulsed collector current | ICM | 160 | A | TC=25℃ | 2 | ||
| Diode DC forward current | IF | 40 | A | TC=25℃ | 2 | ||
| Diode DC forward current | IF | 20 | A | TC=100℃ | 2 | ||
| Diode pulsed forward current | IFM | 60 | A | 2 | |||
| Power dissipation | PD | 250 | W | TC=25℃ | 2 | ||
| Power dissipation | PD | 125 | W | TC=100℃ | 2 | ||
| Operating junction temperature range | Tj | -40 | 175 | ℃ | 2 | ||
| Storage temperature range | Tstg | -55 | 150 | ℃ | 2 | ||
| Maximum lead soldering temperature | TL | 270 | ℃ | 2 | |||
| Thermal resistance junction-to-case (IGBT) | RθJC | 0.6 | ℃/W | 2 | |||
| Thermal resistance junction-to-case (diode) | RθJC | 1.25 | ℃/W | 2 | |||
| Thermal resistance junction-to-ambient | RθJA | 40 | ℃/W | 2 | |||
| Collector-emitter breakdown voltage | V(BR)CES | 650 | V | VGE=0V, ICE=250uA | 2 | ||
| Zero gate voltage collector current | ICES | 1 | mA | VGE=0V, VCE=650V | 2 | ||
| Forward gate-body leakage current | IGES(F) | 250 | nA | VGE=+20V | 2 | ||
| Reverse gate-body leakage current | IGES(R) | -250 | nA | VGE=-20V | 2 | ||
| Collector-emitter saturation voltage | VCE(sat) | 1.65 | 2.2 | V | IC=40A, VGE=15V, TC=25℃ | 2 | |
| Gate threshold voltage | VGE(th) | 3.5 | 6.5 | V | IC=250uA, VCE=VGE | 2 | |
| Diode forward voltage | VF | 1.33 | 2.3 | V | IF=20A, TC=25℃ | 3 |
CAD (KiCad official)
- Symbol:
CRG40T65AN5H - Footprint:
Package_TO_SOT_THT:TO-3P-3_Vertical - 3D model: TO-3PN (KiCad packages3D, STEP)
- 3D model files:
crg40t65an5h-etched.step/crg40t65an5h-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);crg40t65an5h.step/crg40t65an5h.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: CRMICRO datasheet (11 pp, sha256
cdee34f6268f80d1, retrieved 2026-11-06, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).