# CR6889B

**Chip-Rail** · AC-DC Controllers & Regulators · SOT-23-6L

CR6889B from Chip-Rail, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the controller, as printed as 地脚 (ground pin) on the SOT23-6L pinout. |
| 2 | FB | input | Voltage feedback pin that, together with CS, sets the output duty cycle and also controls the operating frequency; FB rising above 4.1 V for 60 ms triggers overload protection. |
| 3 | OVP | input | Senses the auxiliary-winding voltage through an external resistor divider to set the output overvoltage threshold (3 V typical, 2.85 V to 3.15 V), and leaving it floating disables output OVP. |
| 4 | CS | input | Current sense pin where a resistor between the MOSFET source and ground senses inductor current, with overcurrent threshold 0.45 V typical at 0% duty and clamp at 0.72 V. |
| 5 | VDD | power_in | Supply pin with UVLO turn-on at 17.2 V typical and recommended operating range 12 V to 26 V, VDD overvoltage protection at 28 V typical, and absolute maximum rating of 30 V. |
| 6 | GATE | output | Gate driver output that drives the external power MOSFET gate, with output low 1 V maximum at 5 mA, output high 6 V at 20 mA, and clamp voltage 11 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Chip-Rail |
| Package | SOT-23-6L |
| Category | Power Management ICs |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 电源电压 | VVDD | -0.3 |  | 30 | V |  | 3 |
| FB脚输入电压 | VFB | -0.3 |  | 7 | V |  | 3 |
| CS脚输入电压 | VCS | -0.3 |  | 7 | V |  | 3 |
| OVP脚输入电压 | VOVP | -0.3 |  | 7 | V |  | 3 |
| 焊接温度 | TL |  |  | 260 | ℃ | 10s | 3 |
| 工作结温范围 | TSTG | -40 |  | 150 | ℃ |  | 3 |
| VDD电压 | VVDD | 12 |  | 26 | V |  | 3 |
| 工作温度 | TOA | -20 |  | 85 | ℃ |  | 3 |
| 启动电流 | IST |  | 3 | 10 | μA | UVLO_OFF-1V | 4 |
| 工作电流 | IOP |  | 2.5 | 3.5 | mA | VCS=4.5V, VFB=3V | 4 |
| CRM模式工作电流 | IOP_CRM |  | 0.6 | 0.7 | mA | VCS=0V, VFB=0.5V | 4 |
| 系统启动VDD电压 | UVLO_OFF | 16.2 | 17.2 | 18.2 | V |  | 4 |
| 系统关断VDD电压 | UVLO_ON | 6.8 | 7.3 | 7.8 | V |  | 4 |
| VDD过压保护 | VDD_OVP | 26.5 | 28 | 29.5 | V |  | 4 |
| 最大占空比 | DMAX | 77 | 80 | 83 | % |  | 4 |
| 0占空比时过流检测阈值电压 | VTH_OC | 0.43 | 0.45 | 0.47 | V | 0 占空比时 | 4 |
| 输出过压保护电压阈值 | VOutput_OVP | 2.85 | 3 | 3.15 | V |  | 4 |
| PWM频率 | FOSC | 60 | 65 | 70 | kHz |  | 5 |
| 频率抖动范围 | ΔFJITTER | -6 |  | 6 | % |  | 5 |
| GATE上拉PMOS开启时VDD电压 | VPULL_UP |  | 10 |  | V |  | 4 |
| PWM输入增益 | AVCS |  | 3.5 |  | V/V | △FB/△CS | 4 |
| FB短路电流 | IFB |  | 200 |  | μA | VFB=0V | 4 |
| FB开路电压 | VFB |  | 5.1 |  | V | VFB=Open | 4 |
| 进入PFM时的FB电压 | VREF_GREEN |  | 2.1 |  | V |  | 4 |
| 退出CRM时的FB电压 | VCRM_H |  | 1.23 |  | V |  | 4 |
| 进入CRM时的FB电压 | VCRM_L |  | 1.13 |  | V |  | 4 |
| 过载保护时FB电压 | VOLP |  | 4.1 |  | V |  | 4 |
| 过载保护延迟时间 | TOLP |  | 60 |  | ms |  | 4 |
| 软启动时间 | TSS |  | 2.5 |  | ms |  | 4 |
| 前沿消隐时间 | TLEB |  | 300 |  | ns |  | 4 |
| 过流检测延迟时间 | TD_OC |  | 90 |  | ns |  | 4 |
| 过流检测箝位电压 | VTH_OC_CLAMP |  | 0.72 |  | V |  | 4 |
| 过热保护检测的温度 | OTP |  | 150 |  | ℃ |  | 4 |
| 过热保护检测迟滞 | Hys. |  | 30 |  | ℃ |  | 4 |
| 输出过压保护检测延迟时间 | TD_Output_OVP |  | 6 |  | Cycles |  | 4 |
| 输出低电平 | VOL |  | 1 |  | V | IO=5mA | 5 |
| 输出高电平 | VOH |  | 6 |  | V | IO=20mA | 5 |
| 输出箝位电压 | VCLAMP |  | 11 |  | V |  | 5 |
| 上升时间 | TR |  | 100 |  | ns | CL=1nF | 5 |
| 下降时间 | TF |  | 30 |  | ns | CL=1nF | 5 |
| PFM最小频率 | FPFM |  | 22 |  | kHz |  | 5 |
| VDD对PWM频率的影响 | ΔFVDD |  | 1 |  | % |  | 5 |
| 温度对PWM频率的影响 | ΔFTEMP |  | 1 |  | % | -30~100℃ | 5 |
| 频率抖动周期 | FJITTER |  | 32 |  | Hz |  | 5 |

## CAD (KiCad official)

- Symbol: `CR6889B`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6L (KiCad packages3D, STEP)
- 3D model files: `cr6889b-etched.step` / `cr6889b-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cr6889b.step` / `cr6889b.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Chip-Rail datasheet](docs/cr6889b-datasheet.pdf) (10 pp, sha256 `47730a647c462c00`, retrieved 2026-11-02, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cr6889b-datasheet.pdf)