CPDT6-5V0UPC-HF

{
  "schema_version": 1,
  "type": "component",
  "slug": "cpdt6-5v0upc-hf",
  "title": "CPDT6-5V0UPC-HF",
  "brief": "Leiditech ESD And Surge Protection (TVS/ESD), SOT-26. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "circuit protection",
    "cpdt6-5v0upc-hf"
  ],
  "component": {
    "mpn": "CPDT6-5V0UPC-HF",
    "manufacturer": "Leiditech",
    "package": "SOT-26",
    "pin_count": 6,
    "category": "Circuit Protection",
    "subcategory": "ESD And Surge Protection (TVS/ESD)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603110628097732608",
    "parts": {
      "symbol": "cpdt6-5v0upc-hf.kicad_sym",
      "footprint": "cpdt6-5v0upc-hf.kicad_mod",
      "model_3d": "cpdt6-5v0upc-hf-etched.glb",
      "model_3d_plain": "cpdt6-5v0upc-hf.glb",
      "model_3d_step": "cpdt6-5v0upc-hf-etched.step",
      "model_3d_step_plain": "cpdt6-5v0upc-hf.step",
      "lbr": "cpdt6-5v0upc-hf.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "I/O1",
        "type": "passive",
        "description": "Protected data I/O line 1. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5). Typical junction capacitance ~1.5pF line-to-line."
      },
      {
        "number": "2",
        "name": "REF1/GND",
        "type": "power_in",
        "description": "Negative reference (REF1). Connect directly to the board ground plane via the shortest path to minimize parasitic inductance during ESD/EFT/surge events."
      },
      {
        "number": "3",
        "name": "I/O3",
        "type": "passive",
        "description": "Protected data I/O line 3. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5). Clamping voltage 25V max at Ipp=12A (8/20µs)."
      },
      {
        "number": "4",
        "name": "I/O4",
        "type": "passive",
        "description": "Protected data I/O line 4. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5)."
      },
      {
        "number": "5",
        "name": "REF2/VCC",
        "type": "power_in",
        "description": "Positive reference (REF2). Typically connected to the protected supply rail (e.g., VBUS/VCC ~5V); steering diodes clamp high-going transients to this rail. VRWM=5V."
      },
      {
        "number": "6",
        "name": "I/O2",
        "type": "passive",
        "description": "Protected data I/O line 2. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5)."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603110628097732608",
        "pages": null,
        "sha256": "ab759c0b9122d198",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 6,
        "described": 6,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cpdt6-5v0upc-hf.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.8,
          2.9,
          1.55
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "c9fe686b4d1b56927a41fa84a9bc1efb61d8a45a123a3db43bcaa05c2891d635",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cpdt6-5v0upc-hf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.8,
          2.9,
          1.55
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d6d8930675dc465e26430f1a1b7978878ddcf9772cf84a934051d771e2be0a03",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Leiditech",
      "Package": "SOT-26",
      "Category": "Circuit Protection",
      "Pins": "6"
    }
  },
  "variants": [
    {
      "mpn": "CPDT6-5V0UPC-HF",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cpdt6-5v0upc-hf"
  ],
  "discovery_pitch": "CPDT6-5V0UPC-HF (Leiditech) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cpdt6-5v0upc-hf.kicad_sym",
    "cpdt6-5v0upc-hf.kicad_mod",
    "cpdt6-5v0upc-hf.glb",
    "cpdt6-5v0upc-hf.step",
    "cpdt6-5v0upc-hf.lbr",
    "docs/hero.png",
    "docs/cpdt6-5v0upc-hf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T19:32:15.046Z"
}