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CPDQC5V0P-HF
Public Made by Adomby adom
Leiditech ESD Protection Devices, DFN1006-2. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CPDQC5V0P-HF
Leiditech · ESD Protection Devices · DFN1006-2
CPDQC5V0P-HF from Leiditech, in a DFN1006-2. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Bi-directional TVS terminal (interchangeable with the other terminal) with VRWM 5V, VBR 6V min at 1mA, and ±30kV IEC 61000-4-2 ESD protection. |
| 2 | 2 | passive | Bi-directional TVS terminal (interchangeable with the other terminal) with VRWM 5V, 15pF typical capacitance, and 80W peak pulse power (8/20µs). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | DFN1006-2 |
| Category | TVS/Fuse/Board Level Protection |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse working voltage | VRWM | 5 | V | TA=25°C | 2 | ||
| Breakdown voltage | VBR | 6 | V | IT=1 mA, TA=25°C | 2 | ||
| Reverse leakage current | IR | 0.5 | μA | TA=25°C | 2 | ||
| Clamping voltage | VC | 12.5 | V | @6 A, TA=25°C | 2 | ||
| Clamping voltage @1A | VC | 7.5 | V | @1A, TA=25°C | 2 | ||
| Junction capacitance | C | 15 | pF | TA=25°C | 2 | ||
| Peak Pulse Power | Ppp | 80 | W | 8/20µs, Tamb=25°C | 1 | ||
| ESD per IEC 61000-4-2 (Air) | VESD | -30 | 30 | kV | Tamb=25°C | 1 | |
| ESD per IEC 61000-4-2 (Contact) | VESD | -30 | 30 | kV | Tamb=25°C | 1 | |
| Operating Temperature Range | TJ | -55 | 125 | ℃ | 1 | ||
| Storage Temperature Range | TSTJ | -55 | 150 | ℃ | 1 |
CAD (KiCad official)
- Symbol:
CPDQC5V0P-HF - Footprint:
Diode_SMD:D_SOD-882 - 3D model: DFN1006-2 (KiCad packages3D, STEP)
- 3D model files:
cpdqc5v0p-hf-etched.step/cpdqc5v0p-hf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cpdqc5v0p-hf.step/cpdqc5v0p-hf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Leiditech datasheet (4 pp, sha256
ec49f904a17c4cbe, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CPDQC5V0P-HF
**Leiditech** · ESD Protection Devices · DFN1006-2
CPDQC5V0P-HF from Leiditech, in a DFN1006-2. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Bi-directional TVS terminal (interchangeable with the other terminal) with VRWM 5V, VBR 6V min at 1mA, and ±30kV IEC 61000-4-2 ESD protection. |
| 2 | 2 | passive | Bi-directional TVS terminal (interchangeable with the other terminal) with VRWM 5V, 15pF typical capacitance, and 80W peak pulse power (8/20µs). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | DFN1006-2 |
| Category | TVS/Fuse/Board Level Protection |
| Pins | 2 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse working voltage | VRWM | | | 5 | V | TA=25°C | 2 |
| Breakdown voltage | VBR | 6 | | | V | IT=1 mA, TA=25°C | 2 |
| Reverse leakage current | IR | | | 0.5 | μA | TA=25°C | 2 |
| Clamping voltage | VC | | | 12.5 | V | @6 A, TA=25°C | 2 |
| Clamping voltage @1A | VC | | 7.5 | | V | @1A, TA=25°C | 2 |
| Junction capacitance | C | | 15 | | pF | TA=25°C | 2 |
| Peak Pulse Power | Ppp | | | 80 | W | 8/20µs, Tamb=25°C | 1 |
| ESD per IEC 61000-4-2 (Air) | VESD | -30 | | 30 | kV | Tamb=25°C | 1 |
| ESD per IEC 61000-4-2 (Contact) | VESD | -30 | | 30 | kV | Tamb=25°C | 1 |
| Operating Temperature Range | TJ | -55 | | 125 | ℃ | | 1 |
| Storage Temperature Range | TSTJ | -55 | | 150 | ℃ | | 1 |
## CAD (KiCad official)
- Symbol: `CPDQC5V0P-HF`
- Footprint: `Diode_SMD:D_SOD-882`
- 3D model: DFN1006-2 (KiCad packages3D, STEP)
- 3D model files: `cpdqc5v0p-hf-etched.step` / `cpdqc5v0p-hf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cpdqc5v0p-hf.step` / `cpdqc5v0p-hf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Leiditech datasheet](docs/cpdqc5v0p-hf-datasheet.pdf) (4 pp, sha256 `ec49f904a17c4cbe`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cpdqc5v0p-hf-datasheet.pdf)