component

COS6042SR

Public Made by Adom

by adom

COSINE Operational Amplifier, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs cos6042sr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
cos6042sr-etched.fit.json cos6042sr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cos6042sr-etched.glb cos6042sr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body w… · Ray
cos6042sr-etched.step cos6042sr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body w… · Ray
cos6042sr.glb Publish 0.1.0 · Ray
cos6042sr.kicad_mod Publish 0.1.0 · Ray
cos6042sr.kicad_sym Publish 0.1.0 · Ray
cos6042sr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
cos6042sr.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json cos6042sr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body w… · Ray
README.md cos6042sr: specified limits as data (metadata.characteristics, 24 rows from the datasheet) · Ray

COS6042SR

COSINE · Operational Amplifier · SOP-8

COS6042SR from COSINE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 output Output of amplifier A (channel 1). Output voltage swings to within ~10mV of each supply rail into RL=50kΩ. Short-circuit current ±20mA typical.
2 -IN1 input Inverting input of amplifier A. Voltage range from -Vs -0.3V to +Vs +0.3V. Input bias current 1pA typical (10pA max).
3 +IN1 input Non-inverting input of amplifier A. Rail-to-rail input, common-mode range -0.1V to +Vs +0.1V (VS = 5.5V). Same voltage range as -IN1.
4 -Vs power_in Negative power supply or ground. If not connected to ground, bypass with a 0.1μF capacitor as close to the part as possible. Total supply +Vs to -Vs range 1.4V to 5.5V.
5 +IN2 input Non-inverting input of amplifier B. Rail-to-rail input, common-mode range -0.1V to +Vs +0.1V.
6 -IN2 input Inverting input of amplifier B. Voltage range from -Vs -0.3V to +Vs +0.3V. Input bias current 1pA typical.
7 OUT2 output Output of amplifier B (channel 2). Rail-to-rail output, swings within 10mV of each supply rail. Short-circuit current ±20mA typical.
8 +Vs power_in Positive power supply, 1.4V to 5.5V range (6.0V absolute max +Vs to -Vs). Bypass with a 0.1μF ceramic capacitor close to the pin; a 2.2μF tantalum can be added for better performance. Quiescent current 500nA per amplifier.

Key specifications

Parameter Value
Manufacturer COSINE
Package SOP-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • COS6042SR
  • COS6042SRMR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Voltage Range 1.4 5.5 V 4
DC Supply Voltage 1.4 5.5 V 3
Operating Ambient Temperature -40 85 °C 3
Power Supply: +Vs to -Vs 6 V 3
Input Current 10 mA Footnote (2): input signals swinging more than 0.5V beyond supply rails should be current-limited to 10mA or less 3
Storage Temperature Range -65 150 °C 3
Junction Temperature 150 °C 3
Operating Temperature Range -40 125 °C 3
ESD Susceptibility, HBM 2000 V HBM 3
Input Offset Voltage VOS 1 5 mV 4
Input Bias Current IB 1 10 pA 4
Input Offset Current IOS 1 10 pA 4
Common-Mode Voltage Range VCM -0.1 5.6 V VS = 5.5V 4
Common-Mode Rejection Ratio CMRR 85 dB VCM =0.1V to 4.9V 4
Open-Loop Voltage Gain AOL 90 dB VO=0.2V to 4.8V 4
Output Voltage Swing from Rail 10 mV RL=50kΩ 4
Short-Circuit Current ISC -20 20 mA 4
Power Supply Rejection Ratio PSRR 85 dB VS = +1.8V to +5.5V 4
Quiescent Current / Amplifier IQ 500 nA 4
Input Offset Voltage Drift ΔVOS/ΔT 2.5 μV/°C -40 to 125°C 4
Gain Bandwidth Product GBWP 24 kHz G=+1 4
Slew Rate SR 4.3 V/ms G = +1 , 2V Output Step 4
Voltage Noise Density en 170 nV/√Hz f=1kHz 4
Package Thermal Resistance, junction-to-ambient RθJA 155 °C/W SOP8 package 3

CAD (KiCad official)

  • Symbol: COS6042SR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cos6042sr-etched.step / cos6042sr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cos6042sr.step / cos6042sr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cos6042sr.step 122 KB You want the bare part, or you mark your own boards.
cos6042sr-etched.step 2.4 MB You want the part with COS6042SR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 560 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: COSINE datasheet (10 pp, sha256 c1ab67cd8e47b113, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF