component
COS4424SR
Public Made by Adomby adom
COSINE Gate Drivers, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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COS4424SR
COSINE · Gate Drivers · SOP-8
COS4424SR from COSINE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 2 | IN A | input | MOSFET driver input A is a high-impedance, TTL/CMOS compatible input with 300mV hysteresis, and the maximum input voltage is GND-5 V to VDD+0.3 V. |
| 3 | GND | power_in | Ground is the device return pin, which should have a low-impedance connection to the bias supply return because high peak current flows out of it when the load is discharged. |
| 4 | In B | input | MOSFET driver input B is a high-impedance, TTL/CMOS compatible input with 300mV hysteresis, and the maximum input voltage is GND-5 V to VDD+0.3 V. |
| 5 | OUT B | output | Output B is a low-impedance CMOS push-pull output with equal pull-up and pull-down strength, held LOW when its input is unbiased or floating. |
| 6 | VDD | power_in | Bias supply for the driver, rated 4.5V to 25V with respect to GND, to be bypassed with local ceramic capacitors (1.0 µF suggested). |
| 7 | OUT A | output | Output A is a low-impedance CMOS push-pull output with equal pull-up and pull-down strength, held LOW when its input is unbiased or floating. |
| 8 | NC | unconnected | No internal connection; leave this pin unconnected. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | COSINE |
| Package | SOP-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage (absolute maximum) | Vs | 26 | V | 4 | |||
| Operating junction temperature | -40 | 125 | °C | 4 | |||
| Storage temperature | -55 | 150 | °C | 4 | |||
| Maximum input voltage | -5 | V | Min printed as GND-5; max printed as VDD+0.3 (not numeric, left null) | 4 | |||
| DC supply voltage (recommended) | 4.5 | 25 | V | 4 | |||
| Operating ambient temperature | -40 | 125 | °C | 4 | |||
| Operating voltage range | VDD | 4.5 | 25 | V | 5 | ||
| Input current | IIN | -1 | 1 | µA | 0V VIN VDD | 5 | |
| Input signal hysteresis | VHYS | 0.3 | V | 5 | |||
| Under-voltage lockout ON threshold | 3.7 | 4.1 | V | 5 | |||
| Rise time | tR | 12 | ns | CL =1800pF, See Figure 3 | 5 | ||
| Fall time | tF | 12 | ns | CL =1800pF, See Figure 3 | 5 | ||
| Turn-on delay time (non-inverting input) | tD1 | 36 | ns | Non-inverting Input | 5 | ||
| Thermal resistance, SOP8 package | 155 | °C/W | SOP8 package | 4 |
CAD (KiCad official)
- Symbol:
COS4424SR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
cos4424sr-etched.step/cos4424sr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cos4424sr.step/cos4424sr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: COSINE datasheet (8 pp, sha256
eae8fe8c9cd4ca52, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# COS4424SR
**COSINE** · Gate Drivers · SOP-8
COS4424SR from COSINE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection; leave this pin unconnected. |
| 2 | IN A | input | MOSFET driver input A is a high-impedance, TTL/CMOS compatible input with 300mV hysteresis, and the maximum input voltage is GND-5 V to VDD+0.3 V. |
| 3 | GND | power_in | Ground is the device return pin, which should have a low-impedance connection to the bias supply return because high peak current flows out of it when the load is discharged. |
| 4 | In B | input | MOSFET driver input B is a high-impedance, TTL/CMOS compatible input with 300mV hysteresis, and the maximum input voltage is GND-5 V to VDD+0.3 V. |
| 5 | OUT B | output | Output B is a low-impedance CMOS push-pull output with equal pull-up and pull-down strength, held LOW when its input is unbiased or floating. |
| 6 | VDD | power_in | Bias supply for the driver, rated 4.5V to 25V with respect to GND, to be bypassed with local ceramic capacitors (1.0 µF suggested). |
| 7 | OUT A | output | Output A is a low-impedance CMOS push-pull output with equal pull-up and pull-down strength, held LOW when its input is unbiased or floating. |
| 8 | NC | unconnected | No internal connection; leave this pin unconnected. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | COSINE |
| Package | SOP-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage (absolute maximum) | Vs | | | 26 | V | | 4 |
| Operating junction temperature | | -40 | | 125 | °C | | 4 |
| Storage temperature | | -55 | | 150 | °C | | 4 |
| Maximum input voltage | | -5 | | | V | Min printed as GND-5; max printed as VDD+0.3 (not numeric, left null) | 4 |
| DC supply voltage (recommended) | | 4.5 | | 25 | V | | 4 |
| Operating ambient temperature | | -40 | | 125 | °C | | 4 |
| Operating voltage range | VDD | 4.5 | | 25 | V | | 5 |
| Input current | IIN | -1 | | 1 | µA | 0V VIN VDD | 5 |
| Input signal hysteresis | VHYS | | 0.3 | | V | | 5 |
| Under-voltage lockout ON threshold | | 3.7 | | 4.1 | V | | 5 |
| Rise time | tR | | 12 | | ns | CL =1800pF, See Figure 3 | 5 |
| Fall time | tF | | 12 | | ns | CL =1800pF, See Figure 3 | 5 |
| Turn-on delay time (non-inverting input) | tD1 | | 36 | | ns | Non-inverting Input | 5 |
| Thermal resistance, SOP8 package | | | 155 | | °C/W | SOP8 package | 4 |
## CAD (KiCad official)
- Symbol: `COS4424SR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `cos4424sr-etched.step` / `cos4424sr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cos4424sr.step` / `cos4424sr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [COSINE datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905231620591616) (8 pp, sha256 `eae8fe8c9cd4ca52`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cos4424sr-datasheet.pdf)