COS4421SR from COSINE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Bias supply for the MOSFET driver, rated 4.5V to 25V with respect to the Ground pin, and should be bypassed with local ceramic capacitors (1.0 µF suggested).
2	INPUT	input	High-impedance TTL/CMOS compatible control input with 300 mV hysteresis between high and low thresholds, and the output is held LOW if the input is unbiased or floating.
3	NC	unconnected	No Connection; the pin has no internal connection.
4	GND	power_in	Ground is the device return pin and should have a low-impedance connection to the bias supply source return, as high peak current flows out of it when the capacitive load is discharged.
5	GND	power_in	Ground is the device return pin and should have a low-impedance connection to the bias supply source return, as high peak current flows out of it when the capacitive load is discharged.
6	OUTPUT	output	Low-impedance CMOS push-pull output with equal pull-up and pull-down strength, held LOW if the input is unbiased or floating.
7	OUTPUT	output	Low-impedance CMOS push-pull output with equal pull-up and pull-down strength, held LOW if the input is unbiased or floating.
8	VDD	power_in	Bias supply for the MOSFET driver, rated 4.5V to 25V with respect to the Ground pin, and should be bypassed with local ceramic capacitors (1.0 µF suggested).

Key specifications

Parameter	Value
Manufacturer	COSINE
Package	SOP-8
Category	Power Supply Chip
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
DC supply voltage	Vs			28	V		4
Operating junction temperature		-40		125	°C		4
Storage temperature		-55		150	°C		4
Maximum input voltage		-5		0.3	V	Printed as GND-5 (min, 5 V below GND) and VDD+0.3 (max, 0.3 V above VDD)	4
DC Supply Voltage		4.5		25	V		4
Operating ambient temperature		-40		125	°C		4
Operating Voltage Range	VDD	4.5		25	V		5
Input Signal High Threshold	VIH	1.6			V		5
Input Signal Low Threshold	VIL			0.7	V		5
Input Signal High Current (inverting input)	IIH			0.01	µA	Inverting input, VINX=18V	5
Input Signal High Current (non-inverting input)	IIH		88	125	µA	Non-inverting input, VINX=18V	5
Input Signal Low Current (inverting input)	IIL		88	125	µA	Inverting input, VINX=0V	5
Input Signal Low Current (non-inverting input)	IIL			0.01	µA	Non-inverting input, VINX=0V	5
High Output Voltage	VOH	-0.025			V	Printed as VDD, 0.025 V (offset from VDD); DC Test	5
Low Output Voltage	VOL			0.025	V	DC Test	5
Pull-Up Resistance	ROH			0.83	Ω	Source Current = 10mA	5
Pull-Down Resistance	ROL			0.5	Ω	Sink Current = -10mA	5
Peak Output Current	IPK	9			A	10V ≤ VDD ≤ 18V	5
Power Supply Current	ICC			0.85	mA	VIN=3V	5
Power Supply Current	ICC			0.65	mA	VIN=0V	5
Under-Voltage Lockout ON Threshold		3.7		4.1	V		5
Under-Voltage Lockout Hysteresis			0.5		V		5
Input Signal Hysteresis	VHYS		0.3		V		5
Rise Time	tR		35		ns	CL = 10,000 pF, See Figure 3	5
Fall Time	tF		36		ns	CL = 10,000 pF, See Figure 3	5
Turn-On Delay Time	tD1		58		ns	COS4421, CL = 10,000 pF	6
Turn-Off Delay Time	tD2		59		ns	COS4421, CL = 10,000 pF	6
Thermal Shutdown Threshold			150		°C		6
Thermal Shutdown Threshold Hysteresis			25		°C		6
Package Thermal Resistance			155		°C/W	SOP8 package	4

CAD (KiCad official)

Symbol: COS4421SR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)
3D model files: cos4421sr-etched.step / cos4421sr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cos4421sr.step / cos4421sr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: COSINE datasheet (7 pp, sha256 2485da00aa848fb7, retrieved 2026-11-04, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

COS4421SR

Verified COS4421SR

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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