component
COS27424SR
Public Made by Adomby adom
COSINE Gate Drivers, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 5d ago |
| viewers | 5d ago |
| cos27424sr-etched.glb | 5d ago |
| cos27424sr-etched.step | 5d ago |
| cos27424sr-hero.glb | 5d ago |
| cos27424sr-hero.overlay.json | 5d ago |
| cos27424sr.glb | 5d ago |
| cos27424sr.kicad_mod | 5d ago |
| cos27424sr.kicad_sym | 5d ago |
| cos27424sr.lbr | 5d ago |
| cos27424sr.step | 5d ago |
| package.json | 5d ago |
| page.json | 5d ago |
| README.md | 5d ago |
COS27424SR
COSINE · Gate Drivers · SOP-8
COS27424SR from COSINE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ENA | input | Enable input for driver A with logic-compatible threshold and 300 mV hysteresis; internally pulled up to VDD through 100 kΩ for active-high operation, may be left open, and the output is LOW when disabled regardless of the input state. |
| 2 | IN A | input | TTL/CMOS-compatible high-impedance input for driver A with 300 mV hysteresis; if not used it must be tied to VDD or GND and must not be left floating. |
| 3 | GND | power_in | Device return pin that should have a low-impedance connection to the bias supply return, as high peak current flows out of it when the capacitive load is discharged; the device is not damaged by up to 5 V of noise spiking on this pin. |
| 4 | IN B | input | TTL/CMOS-compatible high-impedance input for driver B with 300 mV hysteresis; if not used it must be tied to VDD or GND and must not be left floating. |
| 5 | OUT B | output | Low-impedance CMOS push-pull output of channel B with equal pull-up and pull-down strength, in phase with input B for the COS27424, and LOW when the device is disabled. |
| 6 | VDD | power_in | Bias supply for the MOSFET driver, rated 4.5 V to 25 V with respect to the GND pin, to be bypassed with local ceramic capacitors (1.0 µF suggested). |
| 7 | OUT A | output | Low-impedance CMOS push-pull output of channel A with equal pull-up and pull-down strength, in phase with input A for the COS27424, and LOW when the device is disabled. |
| 8 | ENB | input | Enable input for driver B with logic-compatible threshold and 300 mV hysteresis; internally pulled up to VDD through 100 kΩ for active-high operation, may be left open, and the output is LOW when disabled regardless of the input state. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | COSINE |
| Package | SOP-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating junction temperature | -40 | 125 | °C | 4 | |||
| Storage temperature | -55 | 150 | °C | 4 | |||
| DC supply voltage | Vs | 26 | V | 4 | |||
| Maximum input voltage | -5 | V | Referenced to GND (printed as GND-5) | 4 | |||
| Maximum input voltage | 0.3 | V | Referenced to VDD (printed as VDD+0.3) | 4 | |||
| DC Supply Voltage | 4.5 | 25 | V | 5 | |||
| Operating ambient temperature | -40 | 125 | °C | 5 | |||
| Input Current | IIN | -1 | 1 | µA | 0V ≤ VIN ≤ VDD | 5 | |
| High-level Input Voltage (enable) | VIHEN | 1.7 | 2.4 | 2.9 | V | 5 | |
| Low-level Input Voltage (enable) | VILEN | 1.1 | 1.8 | 2.2 | V | 5 | |
| Hysteresis (enable) | VHYSEN | 0.15 | 0.3 | 0.9 | V | 5 | |
| Enable Impedance | REN | 90 | 100 | 110 | kΩ | 5 | |
| Operating Voltage Range | VDD | 4.5 | 25 | V | 6 | ||
| Under-Voltage Lockout ON Threshold | 3.7 | 4.1 | V | Printed as two values (3.7, 4.1); column placement not printed | 6 | ||
| Input Signal High Threshold | VIH | 1.8 | V | 5 | |||
| Input Signal Low Threshold | VIL | 0.7 | V | 5 | |||
| Input Signal Hysteresis | VHYS | 0.3 | V | 5 | |||
| Low Output Voltage | VOL | 0.025 | V | DC Test | 5 | ||
| Pull-Up Resistance | ROH | 1.6 | Ω | Source Current = 10mA | 5 | ||
| Pull-Down Resistance | ROL | 1.5 | Ω | Sink Current = -10mA | 5 | ||
| Peak Output Current | IPK | 4.5 | A | 10V ≤ VDD ≤ 24V | 5 | ||
| Power Supply Current | ICC | 0.9 | mA | VINA=VINB=3V | 6 | ||
| Power Supply Current | ICC | 0.5 | mA | VINA=VINB=0V | 6 | ||
| Under-Voltage Lockout Hysteresis | 0.5 | V | 6 | ||||
| Rise Time | tR | 12 | ns | CL =1800pF, See Figure 3 | 6 | ||
| Fall Time | tF | 12 | ns | CL =1800pF, See Figure 3 | 6 | ||
| Turn-On Delay Time | tD1 | 36 | ns | Non-inverting Input | 6 | ||
| Turn-On Delay Time | tD1 | 35 | ns | Inverting Input | 6 | ||
| Thermal Shutdown Threshold | 150 | °C | 6 | ||||
| Thermal Shutdown Threshold Hysteresis | 25 | °C | 6 | ||||
| Package Thermal Resistance (SOP8) | 155 | °C/W | SOP8 package | 4 |
CAD (KiCad official)
- Symbol:
COS27424SR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
cos27424sr-etched.step/cos27424sr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cos27424sr.step/cos27424sr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: COSINE datasheet (8 pp, sha256
a4d0295b814ef778, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).