component
COS13487EESA
Public Made by Adomby adom
COSINE RS-485 / RS-422 ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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COS13487EESA
COSINE · RS-485 / RS-422 ICs · SOP-8
COS13487EESA from COSINE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RO | output | Receiver output: when the receiver is enabled (RE low), RO goes high if A > B by 200 mV and goes low if A < B by 200 mV. |
| 2 | RE | input | Receiver output enable: a low enables RO, and a high lets the auto-direction circuit control the receiver; RE is a hot-swap input. |
| 3 | SHDN | input | Shutdown: driving SHDN low puts the device in shutdown mode, and driving it high lets the device operate normally. |
| 4 | DI | input | Driver input: driving DI low forces the non-inverting output low and the inverting output high, and driving it high does the reverse; DI also drives the internal state machine that automatically enables and disables the driver. |
| 5 | GND | power_in | Ground reference for the device; VCC must be bypassed to this pin with a 0.1 µF capacitor. |
| 6 | A | bidirectional | Non-inverting receiver input and non-inverting driver output on the RS-485 bus; the datasheet specifies a bus common-mode input range of -7 V to 12 V. |
| 7 | B | bidirectional | Inverting receiver input and inverting driver output on the RS-485 bus; the datasheet specifies a bus common-mode input range of -7 V to 12 V. |
| 8 | Vcc | power_in | Power supply input, 3 V to 5.5 V; bypass VCC to GND with a 0.1 µF capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | COSINE |
| Package | SOP-8 |
| Category | Interface |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
COS13487EESA - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
cos13487eesa-etched.step/cos13487eesa-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cos13487eesa.step/cos13487eesa.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: COSINE datasheet (14 pp, sha256
219cfb3fdda3a53d, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# COS13487EESA
**COSINE** · RS-485 / RS-422 ICs · SOP-8
COS13487EESA from COSINE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RO | output | Receiver output: when the receiver is enabled (RE low), RO goes high if A > B by 200 mV and goes low if A < B by 200 mV. |
| 2 | RE | input | Receiver output enable: a low enables RO, and a high lets the auto-direction circuit control the receiver; RE is a hot-swap input. |
| 3 | SHDN | input | Shutdown: driving SHDN low puts the device in shutdown mode, and driving it high lets the device operate normally. |
| 4 | DI | input | Driver input: driving DI low forces the non-inverting output low and the inverting output high, and driving it high does the reverse; DI also drives the internal state machine that automatically enables and disables the driver. |
| 5 | GND | power_in | Ground reference for the device; VCC must be bypassed to this pin with a 0.1 µF capacitor. |
| 6 | A | bidirectional | Non-inverting receiver input and non-inverting driver output on the RS-485 bus; the datasheet specifies a bus common-mode input range of -7 V to 12 V. |
| 7 | B | bidirectional | Inverting receiver input and inverting driver output on the RS-485 bus; the datasheet specifies a bus common-mode input range of -7 V to 12 V. |
| 8 | Vcc | power_in | Power supply input, 3 V to 5.5 V; bypass VCC to GND with a 0.1 µF capacitor. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | COSINE |
| Package | SOP-8 |
| Category | Interface |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `COS13487EESA`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `cos13487eesa-etched.step` / `cos13487eesa-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cos13487eesa.step` / `cos13487eesa.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [COSINE datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603187399258763264) (14 pp, sha256 `219cfb3fdda3a53d`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cos13487eesa-datasheet.pdf)