component
COS1042T
Public Made by Adomby adom
COSINE CAN ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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COS1042T
COSINE · CAN ICs · SOP-8
COS1042T from COSINE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmit digital data input: LOW selects the dominant bus state and HIGH the recessive state, and TXD has an internal pull-up to VIO that forces a recessive input if it floats. |
| 2 | GND | power_in | Ground reference for the transceiver. |
| 3 | VCC | power_in | Supply voltage for the transceiver, with a recommended operating range of 4.5 V to 5.5 V (5.0 V typical). |
| 4 | RXD | output | Receive digital data output that reads the bus state, driving LOW for dominant and HIGH for recessive, with output current limited to -8 mA to +8 mA. |
| 5 | SPLIT | output | Common-mode stabilization output on the COS1042T that delivers 0.5VCC in Normal mode for a split termination, and is floating in Standby mode or when VCC is off; leave open if unused. |
| 6 | CANL | bidirectional | LOW-level CAN bus I/O line, rated for -44 V to +44 V on the bus lines. |
| 7 | CANH | bidirectional | HIGH-level CAN bus I/O line, rated for -44 V to +44 V on the bus lines. |
| 8 | STB | input | Standby mode control input: HIGH selects low-power Standby mode and LOW selects Normal mode, with an internal pull-up to VIO that forces Standby if the pin floats. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | COSINE |
| Package | SOP-8 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage | VCC | -0.3 | 7 | V | 4 | ||
| DC voltage at TXD, RXD, STB | -0.3 | V | 4 | ||||
| DC voltage at CANH, CANL and SPLIT | -44 | 44 | V | 4 | |||
| RXD output current | -8 | 8 | mA | 4 | |||
| Operating junction temperature | -40 | 125 | °C | 4 | |||
| Storage temperature | -55 | 150 | °C | 4 | |||
| VCC supply voltage | VCC | 4.5 | 5 | 5.5 | V | 4 | |
| VIO supply voltage on pin VIO | VIO | 2.8 | 3.3 | 5.5 | V | 4 | |
| Operating ambient temperature | -40 | 85 | °C | 4 | |||
| Operating junction temperature (recommended) | -40 | 125 | °C | 4 | |||
| Package thermal resistance (SOP8) | 150 | °C/W | 4 | ||||
| VCC supply voltage range | VCC | 4.5 | 5 | 5.5 | V | 5 | |
| Undervoltage detection voltage | VUVD | 3.5 | 4 | 4.5 | V | 5 | |
| Hysteresis of UVD comparator | VUVDH | 0.3 | 0.5 | 0.8 | V | 5 | |
| Supply current (recessive) | ICC | 4 | 10 | mA | VTXD=VIO | 5 | |
| Supply current (dominant) | ICC | 22 | 40 | mA | VTXD=0V | 5 | |
| Standby current (COS1042T variant) | ICCS | 12 | 17 | μA | 5 | ||
| Digital supply voltage range | VIO | 2.8 | 5.5 | V | 5 | ||
| Undervoltage detection voltage (VIO) | VUVIO | 1.3 | 2 | 2.7 | V | 5 | |
| Supply current (VIO, normal mode) | IVIO | 20 | 200 | μA | Normal mode; VTXD=0 or VIO | 5 | |
| Supply current (VIO, standby mode) | IVIO | 12 | 17 | μA | Standby mode | 5 | |
| Standby mode output voltage | VO(S) | -0.1 | 0 | 0.1 | V | Standby mode, no load | 5 |
| Recessive output voltage | VO(R) | 2 | 3 | mV | Normal mode, VTXD=VIO, no load | 5 | |
| Recessive differential output voltage | VO(DIFF) | -50 | 0 | 50 | mV | VTXD=VIO | 5 |
| Recessive differential output voltage (no load) | VO(DIFF) | -500 | 0 | 50 | mV | VTXD=VIO, no load | 5 |
| Recessive short circuit output current | IO(SC) | -5 | 5 | mA | Normal mode, VCANH=VCANH=-27V to +32V | 5 | |
| Dominant output voltage (CANH) | VO(D) | 2.75 | 3.5 | 4.5 | V | Pin CANH, VTXD=0V | 5 |
| Dominant output voltage (CANL) | VO(D) | 0.5 | 1.5 | 2.25 | V | Pin CANL, VTXD=0V | 5 |
| Dominant differential output voltage | VO(DIFF) | 1.5 | 2 | 3 | V | Dominant, Normal mode, VTXD=0V | 5 |
| Dominant output voltage symmetry | VO(D)(M) | -400 | 0 | 400 | mV | VDD-VCANH-VCANL | 6 |
| Dominant short circuit output current (CANH) | IO(SC) | -120 | -70 | -40 | mA | CANH; VTXD=0, VCANH=0V | 6 |
| Dominant short circuit output current (CANL) | IO(SC) | 40 | 85 | 120 | mA | CANL; VTXD=0, VCANL=18V | 6 |
| Recessive differential input voltage | VDIFF(RI) | -1 | 0.5 | V | Normal mode; 12V VCANH,CANL +12V | 6 | |
| Recessive differential input voltage (standby) | VDIFF(RI) | -1 | 0.4 | V | Standby mode; 12V VCANH,CANL +12V | 6 | |
| Dominant differential input voltage | VDIFF(DI) | 0.9 | V | Normal mode; 12V VCANH,CANL +12V | 6 | ||
| Dominant differential input voltage (standby) | VDIFF(DI) | 1 | V | Standby mode; 12V VCANH,CANL +12V | 6 | ||
| Differential receiver threshold | VTH(DIFF) | 0.5 | 0.7 | 0.9 | V | Normal mode; 12V VCANH,CANL +12V | 6 |
| Differential receiver threshold (standby) | VTH(DIFF) | 0.4 | 1.15 | V | Standby mode; 12V VCANH,CANL +12V | 6 | |
| Differential input hysteresis | VHYS(DIFF) | 50 | 200 | mV | Normal mode | 6 | |
| Common mode input resistance | RIN | 10 | 15 | 25 | kΩ | 6 | |
| Common mode resistance matching | RIN(M) | -1 | 1 | % | 6 | ||
| Differential input resistance | RIN(DIFF) | 20 | 30 | 50 | kΩ | 6 | |
| Common mode input capacitance | CIN(CM) | 20 | pF | 6 | |||
| Differential input capacitance | CIN(DIFF) | 10 | pF | 6 | |||
| Input leakage current | ILI | -5 | 5 | μA | VCC = VTXD = VSTB = 0V; VCANH = VCANL= 5V | 6 | |
| SPLIT leakage current (COS1042T only) | IL | -5 | 5 | μA | Standby mode; VSPLIT = -24V to +24V | 6 | |
| LOW-level input voltage (TXD, STB) | VIL | -0.3 | V | 6 | |||
| HIGH-level input current | IIH | -1 | 1 | μA | 6 | ||
| LOW-level input current (TXD) | IIL(TXD) | -270 | -150 | -30 | μA | 7 | |
| LOW-level input current (STB) | IIL(STB) | -20 | -1 | μA | 7 | ||
| LOW-level output voltage (RXD) | VOL | 0.4 | V | IOL=4mA | 7 | ||
| Shutdown junction temperature | TJ(SD) | 160 | 170 | 180 | °C | 7 | |
| Shutdown temperature hysteresis | TJ(HYST) | 20 | 30 | 40 | °C | 7 | |
| Propagation delay TXD Low to RXD Low | tTXDL-RXDL | 220 | ns | Normal mode | 7 | ||
| Propagation delay TXD High to RXD High | tTXDH-RXDH | 220 | ns | Normal mode | 7 | ||
| Bus wake-up filter time | tFLTR(WAKE) | 0.5 | 1 | 4 | μs | Standby mode | 7 |
| Delay standby to normal mode | tWAKE | 2 | 3 | 10 | μs | Negative edge on STB | 7 |
| TXD dominant time-out time | Tto(dom)TXD | 0.3 | 2 | 5 | ms | VTXD=0V, Normal mode | 7 |
| Bus dominant time-out time | Tto(dom)BUS | 0.3 | 2 | 5 | ms | Standby mode | 7 |
CAD (KiCad official)
- Symbol:
COS1042T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
cos1042t-etched.step/cos1042t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cos1042t.step/cos1042t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: COSINE datasheet (14 pp, sha256
fb5e105a075ed27b, retrieved 2026-11-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# COS1042T
**COSINE** · CAN ICs · SOP-8
COS1042T from COSINE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmit digital data input: LOW selects the dominant bus state and HIGH the recessive state, and TXD has an internal pull-up to VIO that forces a recessive input if it floats. |
| 2 | GND | power_in | Ground reference for the transceiver. |
| 3 | VCC | power_in | Supply voltage for the transceiver, with a recommended operating range of 4.5 V to 5.5 V (5.0 V typical). |
| 4 | RXD | output | Receive digital data output that reads the bus state, driving LOW for dominant and HIGH for recessive, with output current limited to -8 mA to +8 mA. |
| 5 | SPLIT | output | Common-mode stabilization output on the COS1042T that delivers 0.5VCC in Normal mode for a split termination, and is floating in Standby mode or when VCC is off; leave open if unused. |
| 6 | CANL | bidirectional | LOW-level CAN bus I/O line, rated for -44 V to +44 V on the bus lines. |
| 7 | CANH | bidirectional | HIGH-level CAN bus I/O line, rated for -44 V to +44 V on the bus lines. |
| 8 | STB | input | Standby mode control input: HIGH selects low-power Standby mode and LOW selects Normal mode, with an internal pull-up to VIO that forces Standby if the pin floats. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | COSINE |
| Package | SOP-8 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage | VCC | -0.3 | | 7 | V | | 4 |
| DC voltage at TXD, RXD, STB | | -0.3 | | | V | | 4 |
| DC voltage at CANH, CANL and SPLIT | | -44 | | 44 | V | | 4 |
| RXD output current | | -8 | | 8 | mA | | 4 |
| Operating junction temperature | | -40 | | 125 | °C | | 4 |
| Storage temperature | | -55 | | 150 | °C | | 4 |
| VCC supply voltage | VCC | 4.5 | 5 | 5.5 | V | | 4 |
| VIO supply voltage on pin VIO | VIO | 2.8 | 3.3 | 5.5 | V | | 4 |
| Operating ambient temperature | | -40 | | 85 | °C | | 4 |
| Operating junction temperature (recommended) | | -40 | | 125 | °C | | 4 |
| Package thermal resistance (SOP8) | | | 150 | | °C/W | | 4 |
| VCC supply voltage range | VCC | 4.5 | 5 | 5.5 | V | | 5 |
| Undervoltage detection voltage | VUVD | 3.5 | 4 | 4.5 | V | | 5 |
| Hysteresis of UVD comparator | VUVDH | 0.3 | 0.5 | 0.8 | V | | 5 |
| Supply current (recessive) | ICC | | 4 | 10 | mA | VTXD=VIO | 5 |
| Supply current (dominant) | ICC | | 22 | 40 | mA | VTXD=0V | 5 |
| Standby current (COS1042T variant) | ICCS | | 12 | 17 | μA | | 5 |
| Digital supply voltage range | VIO | 2.8 | | 5.5 | V | | 5 |
| Undervoltage detection voltage (VIO) | VUVIO | 1.3 | 2 | 2.7 | V | | 5 |
| Supply current (VIO, normal mode) | IVIO | | 20 | 200 | μA | Normal mode; VTXD=0 or VIO | 5 |
| Supply current (VIO, standby mode) | IVIO | | 12 | 17 | μA | Standby mode | 5 |
| Standby mode output voltage | VO(S) | -0.1 | 0 | 0.1 | V | Standby mode, no load | 5 |
| Recessive output voltage | VO(R) | 2 | | 3 | mV | Normal mode, VTXD=VIO, no load | 5 |
| Recessive differential output voltage | VO(DIFF) | -50 | 0 | 50 | mV | VTXD=VIO | 5 |
| Recessive differential output voltage (no load) | VO(DIFF) | -500 | 0 | 50 | mV | VTXD=VIO, no load | 5 |
| Recessive short circuit output current | IO(SC) | -5 | | 5 | mA | Normal mode, VCANH=VCANH=-27V to +32V | 5 |
| Dominant output voltage (CANH) | VO(D) | 2.75 | 3.5 | 4.5 | V | Pin CANH, VTXD=0V | 5 |
| Dominant output voltage (CANL) | VO(D) | 0.5 | 1.5 | 2.25 | V | Pin CANL, VTXD=0V | 5 |
| Dominant differential output voltage | VO(DIFF) | 1.5 | 2 | 3 | V | Dominant, Normal mode, VTXD=0V | 5 |
| Dominant output voltage symmetry | VO(D)(M) | -400 | 0 | 400 | mV | VDD-VCANH-VCANL | 6 |
| Dominant short circuit output current (CANH) | IO(SC) | -120 | -70 | -40 | mA | CANH; VTXD=0, VCANH=0V | 6 |
| Dominant short circuit output current (CANL) | IO(SC) | 40 | 85 | 120 | mA | CANL; VTXD=0, VCANL=18V | 6 |
| Recessive differential input voltage | VDIFF(RI) | -1 | | 0.5 | V | Normal mode; 12V VCANH,CANL +12V | 6 |
| Recessive differential input voltage (standby) | VDIFF(RI) | -1 | | 0.4 | V | Standby mode; 12V VCANH,CANL +12V | 6 |
| Dominant differential input voltage | VDIFF(DI) | 0.9 | | | V | Normal mode; 12V VCANH,CANL +12V | 6 |
| Dominant differential input voltage (standby) | VDIFF(DI) | 1 | | | V | Standby mode; 12V VCANH,CANL +12V | 6 |
| Differential receiver threshold | VTH(DIFF) | 0.5 | 0.7 | 0.9 | V | Normal mode; 12V VCANH,CANL +12V | 6 |
| Differential receiver threshold (standby) | VTH(DIFF) | 0.4 | | 1.15 | V | Standby mode; 12V VCANH,CANL +12V | 6 |
| Differential input hysteresis | VHYS(DIFF) | 50 | | 200 | mV | Normal mode | 6 |
| Common mode input resistance | RIN | 10 | 15 | 25 | kΩ | | 6 |
| Common mode resistance matching | RIN(M) | -1 | | 1 | % | | 6 |
| Differential input resistance | RIN(DIFF) | 20 | 30 | 50 | kΩ | | 6 |
| Common mode input capacitance | CIN(CM) | | | 20 | pF | | 6 |
| Differential input capacitance | CIN(DIFF) | | | 10 | pF | | 6 |
| Input leakage current | ILI | -5 | | 5 | μA | VCC = VTXD = VSTB = 0V; VCANH = VCANL= 5V | 6 |
| SPLIT leakage current (COS1042T only) | IL | -5 | | 5 | μA | Standby mode; VSPLIT = -24V to +24V | 6 |
| LOW-level input voltage (TXD, STB) | VIL | -0.3 | | | V | | 6 |
| HIGH-level input current | IIH | -1 | | 1 | μA | | 6 |
| LOW-level input current (TXD) | IIL(TXD) | -270 | -150 | -30 | μA | | 7 |
| LOW-level input current (STB) | IIL(STB) | -20 | | -1 | μA | | 7 |
| LOW-level output voltage (RXD) | VOL | | | 0.4 | V | IOL=4mA | 7 |
| Shutdown junction temperature | TJ(SD) | 160 | 170 | 180 | °C | | 7 |
| Shutdown temperature hysteresis | TJ(HYST) | 20 | 30 | 40 | °C | | 7 |
| Propagation delay TXD Low to RXD Low | tTXDL-RXDL | | | 220 | ns | Normal mode | 7 |
| Propagation delay TXD High to RXD High | tTXDH-RXDH | | | 220 | ns | Normal mode | 7 |
| Bus wake-up filter time | tFLTR(WAKE) | 0.5 | 1 | 4 | μs | Standby mode | 7 |
| Delay standby to normal mode | tWAKE | 2 | 3 | 10 | μs | Negative edge on STB | 7 |
| TXD dominant time-out time | Tto(dom)TXD | 0.3 | 2 | 5 | ms | VTXD=0V, Normal mode | 7 |
| Bus dominant time-out time | Tto(dom)BUS | 0.3 | 2 | 5 | ms | Standby mode | 7 |
## CAD (KiCad official)
- Symbol: `COS1042T`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `cos1042t-etched.step` / `cos1042t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cos1042t.step` / `cos1042t.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [COSINE datasheet](docs/cos1042t-datasheet.pdf) (14 pp, sha256 `fb5e105a075ed27b`, retrieved 2026-11-05, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cos1042t-datasheet.pdf)