CN809T
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ShangHai Consonance Elec Supervisor and Reset ICs, SOT-23-3. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
CN809T
ShangHai Consonance Elec · Supervisor and Reset ICs · SOT-23-3
CN809T from ShangHai Consonance Elec, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the device. |
| 2 | RESET | output | Active-low CMOS reset output. Driven low when VCC falls below the reset threshold (VRES = 3.08 V typical for the T-suffix). After VCC rises above VRES + VHYST, RESET remains low for at least 140 ms (typ 240 ms) before returning high. Push-pull CMOS output: VOL <= 0.3 V at ISINK = 3.2 mA (VCC = 3 V); VOH >= VCC - 0.4 V at ISRC = 1.2 mA (VCC = 3 V). |
| 3 | VCC | power_in | Positive supply input; this pin is both the device's operating supply and the voltage being monitored. Absolute max 6.0 V; recommended operating range up to 5.5 V. Place a 0.1 µF bypass capacitor close to this pin to improve rejection of short supply glitches. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ShangHai Consonance Elec |
| Package | SOT-23-3 |
| Category | PMIC |
| Pins | 3 |
Ordering variants
Same part, different packaging or reel option.
CN809T
CAD (KiCad official)
- Symbol:
CN809T - Footprint:
Package_TO_SOT_SMD:SOT-23-3 - 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files:
cn809t-etched.step/cn809t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cn809t.step/cn809t.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
cn809t.step |
59 KB | You want the bare part, or you mark your own boards. |
cn809t-etched.step |
1.3 MB | You want the part with CN809T already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 320 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ShangHai Consonance Elec datasheet (7 pp, sha256
bbeb80fd1a0c3663, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CN809T
**ShangHai Consonance Elec** · Supervisor and Reset ICs · SOT-23-3
CN809T from ShangHai Consonance Elec, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the device. |
| 2 | RESET | output | Active-low CMOS reset output. Driven low when VCC falls below the reset threshold (VRES = 3.08 V typical for the T-suffix). After VCC rises above VRES + VHYST, RESET remains low for at least 140 ms (typ 240 ms) before returning high. Push-pull CMOS output: VOL <= 0.3 V at ISINK = 3.2 mA (VCC = 3 V); VOH >= VCC - 0.4 V at ISRC = 1.2 mA (VCC = 3 V). |
| 3 | VCC | power_in | Positive supply input; this pin is both the device's operating supply and the voltage being monitored. Absolute max 6.0 V; recommended operating range up to 5.5 V. Place a 0.1 µF bypass capacitor close to this pin to improve rejection of short supply glitches. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ShangHai Consonance Elec |
| Package | SOT-23-3 |
| Category | PMIC |
| Pins | 3 |
## Ordering variants
Same part, different packaging or reel option.
- `CN809T`
## CAD (KiCad official)
- Symbol: `CN809T`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files: `cn809t-etched.step` / `cn809t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cn809t.step` / `cn809t.glb` are the bare package body.
## 3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
| [`cn809t.step`](cn809t.step) | 59 KB | You want the bare part, or you mark your own boards. |
| [`cn809t-etched.step`](cn809t-etched.step) | 1.3 MB | You want the part with `CN809T` already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 320 faces against 69 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ShangHai Consonance Elec datasheet](docs/cn809t-datasheet.pdf) (7 pp, sha256 `bbeb80fd1a0c3663`, retrieved 2026-08-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cn809t-datasheet.pdf)