main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs cn809j: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
cn809j-etched.fit.json cn809j: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cn809j-etched.glb cn809j: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cn809j-etched.step cn809j: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cn809j.glb Publish 0.1.0 · Ray
cn809j.kicad_mod Publish 0.1.0 · Ray
cn809j.kicad_sym Publish 0.1.0 · Ray
cn809j.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
cn809j.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json cn809j: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md cn809j: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CN809J

ShangHai Consonance Elec · Supervisor and Reset ICs · SOT-23-3

CN809J from ShangHai Consonance Elec, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference for the device.
2 RESET output Active-low CMOS reset output. Driven low when VCC falls below the 4.00 V reset threshold and held low for at least 140 ms (typ 240 ms, max 400 ms) after VCC rises above VRES+VHYST, then goes high. Drives VOL<=0.3 V at ISINK up to 5 mA and VOH>=VCC-0.4 V at ISRC up to 2.5 mA.
3 VCC power_in Positive supply input; this pin is both the operating supply for the internal circuitry and the monitored voltage. Operating range 1.15 V (min guaranteed output) up to 5.5 V (VCCMAX), absolute max 6.0 V. A 0.1 µF bypass to GND close to this pin is recommended to improve rejection of short supply glitches.

Key specifications

Parameter Value
Manufacturer ShangHai Consonance Elec
Package SOT-23-3
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • CN809J

CAD (KiCad official)

  • Symbol: CN809J
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: cn809j-etched.step / cn809j-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cn809j.step / cn809j.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cn809j.step 59 KB You want the bare part, or you mark your own boards.
cn809j-etched.step 1.4 MB You want the part with CN809J already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 331 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ShangHai Consonance Elec datasheet (7 pp, sha256 bbeb80fd1a0c3663, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF