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CN706P
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ShangHai Consonance Elec Monitors & Reset Circuits, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCN706P
ShangHai Consonance Elec · Monitors & Reset Circuits · SOP-8
CN706P from ShangHai Consonance Elec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Manual reset input: a low level triggers a reset pulse, the pin has an internal pull-up and may be left floating, and it is compatible with TTL/CMOS levels. |
| 2 | VCC | power_in | Positive power supply input. |
| 3 | GND | power_in | Power supply ground input. |
| 4 | PFI | input | Power-fail detection input: when the voltage on this pin falls below 1.22 V, PFO is driven low; if unused it may be tied to VCC or GND. |
| 5 | PFO | output | Power-fail detection output: it goes low when the PFI voltage is below 1.22 V and is high otherwise. |
| 6 | WDI | input | Watchdog input: if the level stays high or low for longer than 1.6 s the watchdog timer expires and WDO goes low; floating or tying this pin to a high-impedance node disables the watchdog. |
| 7 | RESET | output | Active-low reset output: held low while VCC is below the reset threshold, then held low for 200 ms after VCC rises above the threshold, and then goes high. |
| 8 | WDO | output | Watchdog output: goes low when the watchdog timer completes its 1.6 s timeout and stays low until the timer is reset, and also goes low while VCC is below the reset threshold. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ShangHai Consonance Elec |
| Package | SOP-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating supply voltage range | VCC | 1.15 | 5.5 | V | 6 | ||
| Reset threshold | VRES | 2.55 | 2.63 | 2.7 | V | CN706P/706R/708R/813R | 6 |
| Reset pulse width | tRES | 140 | 200 | 280 | ms | 6 | |
| RESET output low voltage | VOL1 | 0.3 | V | ISINK=3.2mA, VCC=5V | 6 | ||
| Watchdog timeout | tWD | 1 | 1.6 | 2.25 | s | 6 | |
| WDI pulse width | tWP | 120 | ns | VCC<4.5V | 6 | ||
| WDI pulse width | tWP | 50 | ns | VCC=5V | 6 | ||
| WDI high input threshold | 3.5 | V | VCC=5V | 6 | |||
| WDI pull-up resistance | 125 | 250 | 500 | K | VCC>VRES | 7 | |
| WDI pull-down resistance | 88 | 175 | 350 | K | VCC>VRES | 7 | |
| WDO output low voltage | VOL2 | 0.3 | V | ISINK=3.2mA | 7 | ||
| MR pull-up current | 100 | 250 | 600 | uA | VCC=5V, MR=0V | 7 | |
| MR pull-up current | 60 | 152 | 360 | uA | VCC=4V, MR=0V | 7 | |
| MR pull-up current | 32 | 75 | 180 | uA | VCC=3V, MR=0V | 7 | |
| MR pull-up current | 20 | 44 | 105 | uA | VCC=2.5V, MR=0V | 7 | |
| MR pulse width | TMR | 150 | ns | VCC=5V | 7 | ||
| MR pulse width | TMR | 500 | ns | VCC<4.5V | 7 | ||
| MR low input threshold | 0.8 | V | VCC=5V | 7 | |||
| MR high input threshold | 2 | V | VCC=5V | 7 | |||
| MR to reset output delay | tMD | 250 | ns | VCC=5V | 7 | ||
| MR to reset output delay | tMD | 750 | ns | VCC<4.5V | 7 | ||
| PFI input threshold | VPFI | 1.184 | 1.22 | 1.256 | V | 7 | |
| PFO output low voltage | VOL3 | 0.3 | V | ISINK=3.2mA | 7 | ||
| Supply current | IVCC | 52 | 105 | uA | VCC=5V | 6 | |
| Operating temperature | -40 | 85 | ℃ | 6 | |||
| Supply voltage VCC | VCC | -0.3 | 6 | V | 6 | ||
| Other input pin voltage | -0.3 | 6 | V | 6 | |||
| VCC pin current | 20 | mA | 6 | ||||
| GND pin current | 20 | mA | 6 | ||||
| Input current | 20 | mA | 6 | ||||
| Output current | 20 | mA | 6 | ||||
| ESD voltage (HBM) | 2 | KV | HBM | 6 | |||
| Maximum junction temperature | 150 | ℃ | 6 | ||||
| Storage temperature | -65 | 150 | ℃ | 6 | |||
| Thermal resistance (DIP8) | 120 | /W | DIP8 package | 6 | |||
| Thermal resistance (SOP8) | 190 | /W | SOP8 package | 6 |
CAD (KiCad official)
- Symbol:
CN706P - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
cn706p-etched.step/cn706p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cn706p.step/cn706p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ShangHai Consonance Elec datasheet (14 pp, sha256
9480585162667a7b, retrieved 2026-10-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).