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Contents

README

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CN61C

ShangHai Consonance Elec · Voltage References · SOT-23-3

CN61C from ShangHai Consonance Elec, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RES output Voltage detection output that goes low when VCC is below the detection threshold and goes high when VCC rises above the threshold plus hysteresis (VRES + VHYST); open-drain on the CN61CN25/CN61CN33 variants, absolute maximum -0.3V to +6.0V and 20mA.
2 GND power_in Negative power supply input (ground).
3 VCC power_in Positive power supply input that both powers the internal circuitry and is the monitored voltage, operating range 1.15V to 5.5V and absolute maximum -0.3V to +6.0V.

Key specifications

Parameter Value
Manufacturer ShangHai Consonance Elec
Package SOT-23-3
Category Power Management ICs
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum supply voltage VCCMAX 5.5 V 4
Minimum supply voltage VCCMIN 1.15 V 4
Operating current IVCC 1.5 3 5 µA VCC=3.0V 4
Operating current IVCC 2 4 6 µA VCC=3.7V 4
Detection threshold CN61CN25 VDET 2.45 2.5 2.55 V CN61CN25, VCC falling 4
Detection threshold CN61CN33 VDET 3.235 3.3 3.365 V CN61CN33, VCC falling 4
Detection threshold hysteresis VHYST 0.03 0.05 0.07 xVDF VCC rising, difference from VDET (VDF) 4
RES output low voltage VOL 0.3 V VCC=2V, ISINK=1.5mA 4
VCC pin voltage VCC -0.3 6 V relative to GND 3
RES pin voltage RES -0.3 6 V relative to GND 3
VCC pin current 20 mA 3
RES pin current 20 mA 3
Operating ambient temperature TA -40 85 °C 3
Storage temperature -65 150 °C 3
Soldering temperature 260 °C 10 seconds 3
ESD voltage (HBM) 4 kV HBM 3
Operating temperature range TA -40 85 °C 4
Operating voltage range VCC 1.15 5.5 V 1
VCC to RES delay t1 t1 20 µs VCC from VDET+0.1V to VDET-0.1V 4
VCC to RES delay t2 t2 30 µs VCC from VDET-0.1V to VDET+0.1V 4

CAD (KiCad official)

  • Symbol: CN61C
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: cn61c-etched.step / cn61c-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cn61c.step / cn61c.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ShangHai Consonance Elec datasheet (6 pp, sha256 024dc546002a79d0, retrieved 2026-10-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF