CN3125

{
 "schema": "adom.pads/1",
 "slug": "cn3125",
 "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm",
 "generated_from": {
  "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm@sha256:5848244c5e72002e",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -1.905
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm@sha256:5848244c5e72002e"
 },
 "pad_count": 9,
 "symbol_pins": [
  "1",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 4,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "CE",
   "type": "input",
   "description": "Chip Enable. A logic high enables normal operation; pulling CE low puts the CN3125 into disable mode and the whole device is turned off. TTL/CMOS compatible (VCEH >= 2.2V, VCEL <= 0.7V).",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "ISET",
   "type": "passive",
   "description": "Constant charge current setting and charge current monitor pin. Charge current is programmed by a resistor R_ISET from this pin to GND; V_ISET is regulated to 1.205V in constant-current mode. Charge current: ICH = (V_ISET / R_ISET) x 986.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "GND",
   "type": "power_in",
   "description": "Ground terminal.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "VIN",
   "type": "power_in",
   "description": "Positive input supply voltage (2.7V to 6V, absolute max 6.5V). Powers internal circuitry and the on-chip P-channel power MOSFET. When VIN drops within 10mV of the TOP pin voltage, the part enters low-power sleep mode (TOP/MID current < 3uA).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "TOP",
   "type": "power_out",
   "description": "Positive terminal connection to the top supercapacitor. Charge current is delivered from this pin. For 2-cell configuration, connect to the positive terminal of the top supercap; for single-cell, tie the single supercap between TOP and GND. Continuous short-circuit tolerant.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "MID",
   "type": "bidirectional",
   "description": "Middle connection of the 2 supercapacitors. The negative terminal of the top supercap and the positive terminal of the bottom supercap connect here. Sources/sinks active cell-balancing shunt current (I_SHTOP up to ~55mA typ, I_SHBOT up to ~50mA typ). Continuous short-circuit tolerant.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "PG",
   "type": "output",
   "description": "Open-drain Power Good output (active-low, /PG). Pulls low when the supercapacitor voltage rises above ~94.1% of the final regulated voltage set at FB, and returns to high-impedance when it falls below ~90%. High-impedance when disabled or in sleep mode. Sink current up to 10mA at V_PG = 0.3V.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "FB",
   "type": "input",
   "description": "Supercapacitor voltage feedback pin. The constant-voltage regulation point is set by an external resistor divider tied from TOP (or MID for single-cell) to FB to GND; internal reference V_REGFB = 1.205V (1.193-1.217V). Leakage +/-100nA max.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "rect",
   "at": [
    0.0,
    0.0
   ],
   "rot": 0.0,
   "size": [
    2.41,
    3.3
   ],
   "layers": [],
   "thermal": true,
   "pin": "9",
   "name": "EP",
   "type": "power_in",
   "description": "Exposed thermal pad on the underside of the eSOP-8 package. Must be soldered to the GND plane for proper electrical grounding and heat dissipation.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}