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CMSA5020

Cmos(广东场效应半导体) · MOSFETs · DFN-8(5x6)

CMSA5020 from Cmos(广东场效应半导体), in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET; the datasheet gives no separate limit for this pin, and the absolute maximum VDS of 200 V and continuous ID of 25 A apply between drain and source.
2 S passive Source terminal of the N-channel MOSFET; the datasheet gives no separate limit for this pin, and the absolute maximum VDS of 200 V and continuous ID of 25 A apply between drain and source.
3 S passive Source terminal of the N-channel MOSFET; the datasheet gives no separate limit for this pin, and the absolute maximum VDS of 200 V and continuous ID of 25 A apply between drain and source.
4 G input Gate terminal; the gate-source voltage must not exceed ±30 V (VGS rating), and the part is specified at VGS = 10 V for RDS(on).
5 D passive Drain terminal of the N-channel MOSFET; the datasheet rates VDS at 200 V and continuous ID at 25 A (TC = 25 ℃).
6 D passive Drain terminal of the N-channel MOSFET; the datasheet rates VDS at 200 V and continuous ID at 25 A (TC = 25 ℃).
7 D passive Drain terminal of the N-channel MOSFET; the datasheet rates VDS at 200 V and continuous ID at 25 A (TC = 25 ℃).
8 D passive Drain terminal of the N-channel MOSFET; the datasheet rates VDS at 200 V and continuous ID at 25 A (TC = 25 ℃).
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Cmos(广东场效应半导体)
Package DFN-8(5x6)
Category Transistors/Thyristors
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 200 V VGS=0V, ID=250uA 2
Static Drain-Source On-Resistance RDS(ON) 60 65 mΩ VGS=10V, ID=15A 2
Gate Threshold Voltage VGS(th) 2.5 4.5 V VGS=VDS, ID=250uA 2
Drain-Source Leakage Current IDSS 1 uA VDS=200V, VGS=0V, TJ=25℃ 2
Gate-Source Leakage Current IGSS -100 100 nA VGS = ±30V, VDS=0V 2
Continuous Source Current IS 25 A 2
Pulsed Source Current ISM 75 A VG=VD=0V, Force Current 2
Diode Forward Voltage VSD 1.2 V VGS=0V, IF=28A 2
Drain-Source Voltage VDS 200 V 1
Gate-Source Voltage VGS -30 30 V 1
Continuous Drain Current ID 25 A TC=25℃ 1
Pulsed Drain Current IDM 75 A 1
Storage Temperature Range TSTG -55 150 ℃ 1
Operating Junction Temperature Range TJ -55 150 ℃ 1
Single Pulse Avalanche Energy EAS 680 mJ Note 1: VDD=50V, VGS=10V, L=5mH, IAS=16.5A 1
Total Power Dissipation PD 90 W TC=25℃ 1
Junction-to-Ambient Thermal Resistance RθJA 23 ℃/W t ≤ 10S 1
Junction-to-Case Thermal Resistance RθJC 1.38 ℃/W Steady State 1

CAD (KiCad official)

  • Symbol: CMSA5020
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
  • 3D model files: cmsa5020-etched.step / cmsa5020-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cmsa5020.step / cmsa5020.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cmos(广东场效应半导体) datasheet (3 pp, sha256 33badb6042c44989, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF