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CMS9475

Cmos · MOSFETs · SOP-8

CMS9475 from Cmos, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the N-channel MOSFET, shared with pins 2 and 3.
2 S passive Source of the N-channel MOSFET, shared with pins 1 and 3.
3 S passive Source of the N-channel MOSFET, shared with pins 1 and 2.
4 G input Gate of the N-channel MOSFET, with a maximum rating of ±20 V gate-source and RDS(ON) specified at VGS=10 V and 4.5 V.
5 D passive Drain of the N-channel MOSFET, shared with pins 6, 7 and 8, rated at 60 V drain-source and 6.5 A continuous.
6 D passive Drain of the N-channel MOSFET, shared with pins 5, 7 and 8, rated at 60 V drain-source and 6.5 A continuous.
7 D passive Drain of the N-channel MOSFET, shared with pins 5, 6 and 8, rated at 60 V drain-source and 6.5 A continuous.
8 D passive Drain of the N-channel MOSFET, shared with pins 5, 6 and 7, rated at 60 V drain-source and 6.5 A continuous.

Key specifications

Parameter Value
Manufacturer Cmos
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 60 V VGS=0V , ID=250μA 2
Static Drain-Source On-Resistance RDS(ON) 41 mΩ VGS=10V , ID=5.3A 2
Static Drain-Source On-Resistance RDS(ON) 52 mΩ VGS=4.5V , ID=4.7A 2
Gate Threshold Voltage VGS(th) 1 3 V VGS=VDS , ID =250μA 2
Drain-Source Leakage Current IDSS 1 uA VDS=60V , VGS=0V 2
Gate-Source Leakage Current IGSS 100 nA VGS 20V , VDS=0V 2
Diode Forward Voltage VSD 1.2 V VGS=0V , IS=2A 2
Drain-Source Voltage VDS 60 V TA=25°C 1
Gate-Source Voltage VGS -20 20 V TA=25°C 1
Continuous Drain Current ID 6.5 A TA=25°C 1
Pulsed Drain Current IDM 30 A TA=25°C 1
Total Power Dissipation PD 3.7 W TA=25 1
Storage Temperature Range TSTG -55 150 1
Operating Junction Temperature Range TJ -55 150 1
Thermal Resistance, Junction-to-Ambient (PCB mounted) RθJA 62.5 /W PCB mounted 1
Forward Transconductance gfs 10 S VDS=15V , ID=5.3A 2
Total Gate Charge Qg 22 nC VDS=30V , VGS=10V, ID=5.3A 2
Gate-Drain Charge Qgd 7.5 nC VDS=30V , VGS=10V, ID=5.3A 2
Turn-On Delay Time Td(on) 13 ns VDD=30V , VGEN=10V , RL =6.8, RG =1Ω , ID=4.4A 2
Rise Time Tr 25 ns VDD=30V , VGEN=10V , RL =6.8, RG =1Ω , ID=4.4A 2
Turn-Off Delay Time Td(off) 40 ns VDD=30V , VGEN=10V , RL =6.8, RG =1Ω , ID=4.4A 2
Fall Time Tf 3.5 ns VDD=30V , VGEN=10V , RL =6.8, RG =1Ω , ID=4.4A 2
Input Capacitance Ciss 930 pF VDS=15V , VGS=0V , f=1MHz 2
Output Capacitance Coss 72 pF VDS=15V , VGS=0V , f=1MHz 2
Reverse Transfer Capacitance Crss 80 pF VDS=15V , VGS=0V , f=1MHz 2

CAD (KiCad official)

  • Symbol: CMS9475
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cms9475-etched.step / cms9475-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cms9475.step / cms9475.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cmos datasheet (2 pp, sha256 824813c0857c0d76, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF