component

CMS6679

Public Made by Adom

by adom

Cmos MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttriode-mos tube-transistorcms6679factory-2.0.0extractor-text

Verified CMS6679

by Ray · last 2 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

2 Nov 2026RayPublished by the parts factory: tier lcsc, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CMS6679 · SOP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 2-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-zd9385v8/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ cms6679.kicad_sym✓ cms6679.kicad_mod✓ cms6679.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers cms6679: viewers · Ray 4d ago
cms6679-etched.glb Publish 0.1.0 · Ray 4d ago
cms6679-etched.step cms6679: factory component page (tier=lcsc) · Ray 4d ago
cms6679-hero.glb cms6679: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
cms6679-hero.overlay.json Publish 0.1.0 · Ray 4d ago
cms6679.glb Publish 0.1.0 · Ray 4d ago
cms6679.kicad_mod Publish 0.1.0 · Ray 4d ago
cms6679.kicad_sym Publish 0.1.0 · Ray 4d ago
cms6679.lbr Publish 0.1.0 · Ray 4d ago
cms6679.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier lcsc, 8 pins · Ray 4d ago

CMS6679

Cmos · MOSFETs · SOP-8

CMS6679 from Cmos, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the P-channel MOSFET, rated for a VDS of -30 V.
2 S passive Source terminal of the P-channel MOSFET, rated for a VDS of -30 V.
3 S passive Source terminal of the P-channel MOSFET, rated for a VDS of -30 V.
4 G input Gate terminal; the datasheet rates VGS at ±20 V and gate threshold VGS(th) between -1 V and -3 V at ID=-250μA.
5 D passive Drain terminal; continuous drain current is rated at -18 A with pulsed drain current at -60 A.
6 D passive Drain terminal; continuous drain current is rated at -18 A with pulsed drain current at -60 A.
7 D passive Drain terminal; continuous drain current is rated at -18 A with pulsed drain current at -60 A.
8 D passive Drain terminal; continuous drain current is rated at -18 A with pulsed drain current at -60 A.

Key specifications

Parameter Value
Manufacturer Cmos
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -30 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID -18 A 1
Pulsed Drain Current IDM -60 A 1
Total Power Dissipation PD 3 W TA=25℃ 1
Storage Temperature Range TSTG -55 150 ℃ 1
Operating Junction Temperature Range TJ 150 ℃ 1
Thermal Resistance, Junction-to-Ambient RθJA 150 ℃/W 1
Drain-Source Breakdown Voltage BVDSS -30 V VGS=0V, ID=-250μA 2
Static Drain-Source On-Resistance RDS(ON) 14 mΩ VGS=-10V, ID=-10A 2
Static Drain-Source On-Resistance RDS(ON) 25 mΩ VGS=-4.5V, ID=-10A 2
Gate Threshold Voltage VGS(th) -1 -3 V VGS=VDS, ID=-250μA 2
Drain-Source Leakage Current IDSS -1 uA VDS=-24V, VGS=0V 2
Diode Forward Voltage VSD -1.3 V VGS=0V, ISD=-1A 2
Gate-Source Leakage Current IGSS -100 100 nA VGS = ±20V, VDS=0V 2

CAD (KiCad official)

  • Symbol: CMS6679
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cms6679-etched.step / cms6679-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cms6679.step / cms6679.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cmos datasheet (2 pp, sha256 dd648f587dfa87ac, retrieved 2026-11-02, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF