component
CMS50P06
Public Made by Adomby adom
Cmos , SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCMS50P06
Cmos · IC · SOP-8
CMS50P06 from Cmos, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the P-channel MOSFET, referenced to the gate-source rating of ±25 V. |
| 2 | S | passive | Source terminal of the P-channel MOSFET, referenced to the gate-source rating of ±25 V. |
| 3 | S | passive | Source terminal of the P-channel MOSFET, referenced to the gate-source rating of ±25 V. |
| 4 | G | input | Gate terminal; the gate-source voltage must stay within ±25 V. |
| 5 | D | passive | Drain terminal; rated for a drain-source voltage of -60 V and continuous drain current of -12 A. |
| 6 | D | passive | Drain terminal; rated for a drain-source voltage of -60 V and continuous drain current of -12 A. |
| 7 | D | passive | Drain terminal; rated for a drain-source voltage of -60 V and continuous drain current of -12 A. |
| 8 | D | passive | Drain terminal; rated for a drain-source voltage of -60 V and continuous drain current of -12 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cmos |
| Package | SOP-8 |
| Category | |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -60 | V | 1 | |||
| Gate-Source Voltage | VGS | -25 | 25 | V | 1 | ||
| Continuous Drain Current | ID | -12 | A | 1 | |||
| Pulsed Drain Current | IDM | -36 | A | 1 | |||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Single Pulse Avalanche Energy | EAS | 90 | mJ | 1 | |||
| Total Power Dissipation | PD | 5 | W | TC=25℃ | 1 | ||
| Thermal Resistance, Junction-to-Ambient | RθJA | 85 | ℃/W | PCB mounted | 1 | ||
| Drain-Source Breakdown Voltage | BVDSS | -60 | V | VGS=0V, ID=-250μA | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 25 | mΩ | VGS=-10V, ID=-10A | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 30 | mΩ | VGS=-4.5V, ID=-6A | 2 | ||
| Gate Threshold Voltage | VGS(th) | -1 | -2.5 | V | VGS=VDS, ID=-250μA | 2 | |
| Drain-Source Leakage Current | IDSS | -1 | uA | VDS=-48V, VGS=0V | 2 | ||
| Gate-Source Leakage Current | IGSS | -100 | 100 | nA | VGS = ±25V, VDS=0V | 2 | |
| Diode Forward Voltage | VSD | -1.2 | V | VGS=0V, ISD=-10A | 2 |
CAD (KiCad official)
- Symbol:
CMS50P06 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
cms50p06-etched.step/cms50p06-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cms50p06.step/cms50p06.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Cmos datasheet (2 pp, sha256
cd3e34a5b54937e6, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).