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CMS5006B

Public Made by Adom

by adom

Cmos MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CMS5006B

Cmos · MOSFETs · SOP-8

CMS5006B from Cmos, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET (pins 1-3 are source), drain-source voltage rating -60 V.
2 S passive Source of the P-channel MOSFET (pins 1-3 are source), drain-source voltage rating -60 V.
3 S passive Source of the P-channel MOSFET (pins 1-3 are source), drain-source voltage rating -60 V.
4 G input Gate of the P-channel MOSFET with gate-source voltage limit of ±20 V and threshold of -1 to -3 V.
5 D passive Drain of the P-channel MOSFET, continuous drain current -4 A and pulsed -12 A.
6 D passive Drain of the P-channel MOSFET, continuous drain current -4 A and pulsed -12 A.
7 D passive Drain of the P-channel MOSFET, continuous drain current -4 A and pulsed -12 A.
8 D passive Drain of the P-channel MOSFET, continuous drain current -4 A and pulsed -12 A.

Key specifications

Parameter Value
Manufacturer Cmos
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -60 V TA=25℃ 1
Gate-Source Voltage VGS -20 20 V TA=25℃ 1
Continuous Drain Current ID -4 A TA=25℃ 1
Pulsed Drain Current IDM -12 A TA=25℃ 1
Storage Temperature Range TSTG -55 150 ℃ 1
Operating Junction Temperature Range TJ -55 150 ℃ 1
Single Pulse Avalanche Energy EAS 110 mJ 1
Total Power Dissipation PD 1.5 W TC=25℃ 1
Thermal Resistance, Junction-to-Ambient RθJA 85 ℃/W PCB mounted 1
Drain-Source Breakdown Voltage BVDSS -60 V VGS=0V, ID=-250μA 2
Static Drain-Source On-Resistance RDS(ON) 70 mΩ VGS=-10V, ID=-6A 2
Static Drain-Source On-Resistance RDS(ON) 79 mΩ VGS=-4.5V, ID=-4A 2
Gate Threshold Voltage VGS(th) -1 -3 V VGS=VDS, ID=-250μA 2
Drain-Source Leakage Current IDSS -1 uA VDS=-50V, VGS=0V 2
Gate-Source Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 2
Diode Forward Voltage VSD -1 V VGS=0V, ISD=-5A 2
Forward Transconductance gfs 12 S VDS=-10V, ID=-3A 2
Gate Resistance Rg 43 Ω VDS=0V, VGS=0V, f=1MHz 2
Total Gate Charge Qg 16.5 nC VDS=-30V, VGS=-10V, ID=-3A 2
Turn-On Delay Time Td(on) 8.4 ns VDD=-30V, VGS=-10V, RGEN=6Ω 2
Rise Time Tr 29.7 ns VDD=-30V, VGS=-10V, RGEN=6Ω 2
Turn-Off Delay Time Td(off) 51.8 ns VDD=-30V, VGS=-10V, RGEN=6Ω 2
Fall Time Tf 15.7 ns VDD=-30V, VGS=-10V, RGEN=6Ω 2
Input Capacitance Ciss 1600 pF VDS=-25V, VGS=0V, f=1MHz 2
Output Capacitance Coss 71 pF VDS=-25V, VGS=0V, f=1MHz 2
Reverse Transfer Capacitance Crss 43 pF VDS=-25V, VGS=0V, f=1MHz 2

CAD (KiCad official)

  • Symbol: CMS5006B
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cms5006b-etched.step / cms5006b-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cms5006b.step / cms5006b.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cmos datasheet (2 pp, sha256 7b47e99c342e3cd8, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF