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CMS4614

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Cmos MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CMS4614

Cmos · MOSFETs · SOP-8

CMS4614 from Cmos, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of the N-channel MOSFET (40V, 17mΩ max at VGS=10V, 8A).
2 G1 input Gate of the N-channel MOSFET, with a VGS limit of ±20V.
3 S2 passive Source of the P-channel MOSFET (-40V, 38mΩ max at VGS=-10V, -7A).
4 G2 input Gate of the P-channel MOSFET, with a VGS limit of ±20V.
5 D2 passive Drain of the P-channel MOSFET, with a VDS rating of -40V; internally common with pins 6.
6 D2 passive Drain of the P-channel MOSFET, with a VDS rating of -40V; internally common with pin 5.
7 D1 passive Drain of the N-channel MOSFET, with a VDS rating of 40V; internally common with pin 8.
8 D1 passive Drain of the N-channel MOSFET, with a VDS rating of 40V; internally common with pin 7.

Key specifications

Parameter Value
Manufacturer Cmos
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
P-ch Drain-Source Voltage VDS -40 V p-channel 1
Gate-Source Voltage VGS -20 20 V p-channel 1
P-ch Continuous Drain Current ID -7 A TC=25°C, p-channel 1
P-ch Continuous Drain Current ID -5.5 A TC=70°C, p-channel 1
P-ch Pulsed Drain Current IDM -21 A p-channel 1
Total Power Dissipation PD 2 W TC=25°C 1
Storage Temperature Range TSTG -55 150 °C 1
Operating Junction Temperature Range TJ -55 150 °C 1
N-ch Drain-Source Voltage VDS 40 V n-channel 1
N-ch Continuous Drain Current ID 8 A TC=25°C, n-channel 1
N-ch Continuous Drain Current ID 6 A TC=70°C, n-channel 1
N-ch Pulsed Drain Current IDM 24 A n-channel 1
N-ch Junction-to-Ambient Thermal Resistance RθJA 62.5 ℃/W Steady-State, n-channel 1
P-ch Junction-to-Ambient Thermal Resistance RθJA 62.5 ℃/W Steady-State, p-channel 2
N-ch Drain-Source Breakdown Voltage BVDSS 40 V VGS=0V, ID=250μA 2
N-ch Static Drain-Source On-Resistance RDS(ON) 17 mΩ VGS=10V, ID=6A 2
N-ch Static Drain-Source On-Resistance RDS(ON) 20 mΩ VGS=4.5V, ID=4A 2
N-ch Gate Threshold Voltage VGS(th) 1 3 V VGS=VDS, ID=250μA 2
N-ch Drain-Source Leakage Current IDSS 1 uA VDS=36V, VGS=0V 2
N-ch Gate-Source Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 2
N-ch Continuous Source Current IS 8 A VG=VD=0V, Force Current 2
N-ch Pulsed Source Current ISM 24 A VG=VD=0V, Force Current 2
N-ch Diode Forward Voltage VSD 1.2 V VGS=0V, IS=5A 2
P-ch Drain-Source Breakdown Voltage BVDSS -40 V VGS=0V, ID=-250μA 3
P-ch Static Drain-Source On-Resistance RDS(ON) 38 mΩ VGS=-10V, ID=-5A 3
P-ch Static Drain-Source On-Resistance RDS(ON) 53 mΩ VGS=-4.5V, ID=-2A 3
P-ch Gate Threshold Voltage VGS(th) -1 -3 V VGS=VDS, ID=-250μA 3
P-ch Drain-Source Leakage Current IDSS -1 uA VDS=-32V, VGS=0V 3
P-ch Gate-Source Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 3
P-ch Continuous Source Current IS -7 A VG=VD=0V, Force Current 3
P-ch Pulsed Source Current ISM -21 A VG=VD=0V, Force Current 3
P-ch Diode Forward Voltage VSD -1.2 V VGS=0V, IS=-1A 3
N-ch Forward Transconductance gfs 13 S VDS=5V, ID=3A 2
N-ch Total Gate Charge Qg 13 nC VDS=20V, VGS=10V, ID=8A 2
N-ch Gate-Drain Charge Qgd 3 nC VDS=20V, VGS=10V, ID=8A 2
N-ch Turn-On Delay Time Td(on) 5 ns VDD=20V, VGS=10V, RL=2.5Ω, RGEN=3Ω 2
N-ch Turn-Off Delay Time Td(off) 16 ns VDD=20V, VGS=10V, RL=2.5Ω, RGEN=3Ω 2
N-ch Fall Time Tf 3 ns VDD=20V, VGS=10V, RL=2.5Ω, RGEN=3Ω 2
N-ch Input Capacitance Ciss 1150 pF VDS=20V, VGS=0V, f=1MHz 2
N-ch Output Capacitance Coss 113 pF VDS=20V, VGS=0V, f=1MHz 2
N-ch Reverse Transfer Capacitance Crss 12 pF VDS=20V, VGS=0V, f=1MHz 2
P-ch Forward Transconductance gfs 10 S VDS=-5V, ID=-3A 3
P-ch Total Gate Charge (10V) Qg 14 nC VDS=-20V, VGS=-10V, ID=-8A 3
P-ch Gate-Drain Charge Qgd 3 nC VDS=-20V, VGS=-10V, ID=-8A 3
P-ch Turn-On Delay Time Td(on) 8 ns VDD=-20V, VGS=-10V, RL=2.3Ω, RGEN=6Ω 3
P-ch Turn-Off Delay Time Td(off) 18 ns VDD=-20V, VGS=-10V, RL=2.3Ω, RGEN=6Ω 3
P-ch Fall Time Tf 8 ns VDD=-20V, VGS=-10V, RL=2.3Ω, RGEN=6Ω 3
P-ch Input Capacitance Ciss 2400 pF VDS=-20V, VGS=0V, f=1MHz 3
P-ch Output Capacitance Coss 100 pF VDS=-20V, VGS=0V, f=1MHz 3
P-ch Reverse Transfer Capacitance Crss 65 pF VDS=-20V, VGS=0V, f=1MHz 3

CAD (KiCad official)

  • Symbol: CMS4614
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cms4614-etched.step / cms4614-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cms4614.step / cms4614.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cmos datasheet (3 pp, sha256 63ac736edd0bed4d, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF