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Ray Publish 0.1.0 9246a0e 16d ago

CMS4611S

Cmos · MOSFETs · SOP-8

CMS4611S from Cmos, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of the N-channel MOSFET (60V, 6A rated).
2 G1 input Gate of the N-channel MOSFET, with a maximum gate-source voltage of ±20V.
3 S2 passive Source of the P-channel MOSFET (-60V, -4A rated).
4 G2 input Gate of the P-channel MOSFET, with a maximum gate-source voltage of ±20V.
5 D2 passive Drain of the P-channel MOSFET (-60V max drain-source), shorted to pin 6.
6 D2 passive Drain of the P-channel MOSFET (-60V max drain-source), shorted to pin 5.
7 D1 passive Drain of the N-channel MOSFET (60V max drain-source), shorted to pin 8.
8 D1 passive Drain of the N-channel MOSFET (60V max drain-source), shorted to pin 7.

Key specifications

Parameter Value
Manufacturer Cmos
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage (n-channel) VDS 60 V 1
Drain-Source Voltage (p-channel) VDS -60 V 1
Gate-Source Voltage (both channels) VGS -20 20 V 1
Continuous Drain Current (n-channel) ID 6 A TA=25℃ 1
Continuous Drain Current (p-channel) ID -4 A TA=25℃ 1
Pulsed Drain Current (n-channel) IDM 24 A 1
Pulsed Drain Current (p-channel) IDM -12 A 1
Total Power Dissipation (both channels) PD 2 W TA=25℃ 1
Storage Temperature Range TSTG -55 150 ℃ 1
Operating Junction Temperature Range TJ -55 150 ℃ 1
Maximum Junction-to-Ambient (PCB Mount), n-channel RθJA 34 ℃/W 1
Maximum Junction-to-Ambient (PCB Mount), p-channel RθJA 45 ℃/W 2
Drain-Source Breakdown Voltage (n-channel) BVDSS 60 V VGS=0V , ID=250μA 2
Static Drain-Source On-Resistance (n-channel) RDS(ON) 50 mΩ VGS=10V , ID=3.5A 2
Static Drain-Source On-Resistance (n-channel) RDS(ON) 60 mΩ VGS=4.5V , ID=2A 2
Gate Threshold Voltage (n-channel) VGS(th) 3 V VGS=VDS , ID =250μA 2
Drain-Source Leakage Current (n-channel) IDSS 1 uA VDS=48V , VGS=0V 2
Gate-Source Leakage Current (n-channel) IGSS 100 nA VGS ±20V , VDS=0V 2
Diode Forward Voltage (n-channel) VSD 1.2 V VGS=0V , IS=1A 2
Drain-Source Breakdown Voltage (p-channel) BVDSS -60 V VGS=0V , ID=-250μA 3
Static Drain-Source On-Resistance (p-channel) RDS(ON) 115 mΩ VGS=-10V , ID=-2A 3
Static Drain-Source On-Resistance (p-channel) RDS(ON) 155 mΩ VGS=-4.5V , ID=-2A 3
Gate Threshold Voltage (p-channel) VGS(th) -1.5 -3.5 V VGS=VDS , ID =-250μA 3
Drain-Source Leakage Current (p-channel) IDSS -1 uA VDS=-48V , VGS=0V 3
Gate-Source Leakage Current (p-channel) IGSS -100 100 nA VGS ±20V , VDS=0V 3
Diode Forward Voltage (p-channel) VSD -1.2 V VGS=0V , IS=-1A 3

CAD (KiCad official)

  • Symbol: CMS4611S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cms4611s-etched.step / cms4611s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cms4611s.step / cms4611s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cmos datasheet (3 pp, sha256 cc204c3e97744250, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF