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Name	Last commit message	Last updated
docs	cmp6793re: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
viewers	cmp6793re: viewers · Ray	1mo ago
cmp6793re-etched.fit.json	cmp6793re: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
cmp6793re-etched.glb	cmp6793re: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
cmp6793re-etched.step	cmp6793re: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
cmp6793re.glb	Publish 0.1.0 · Ray	1mo ago
cmp6793re.kicad_mod	Publish 0.1.0 · Ray	1mo ago
cmp6793re.kicad_sym	Publish 0.1.0 · Ray	1mo ago
cmp6793re.lbr	Publish 0.1.0 · Ray	1mo ago
cmp6793re.step	Publish 0.1.0 · Ray	1mo ago
package.json	Publish 0.1.0 · Ray	1mo ago
page.json	cmp6793re: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray	1mo ago
README.md	cmp6793re: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray	1mo ago

CMP6793RE

coileasy · Transformer Drivers · ESOP-8

CMP6793RE from coileasy, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CLK	input	Oscillator clock frequency adjust input. Floating or tied to GND gives the default 240 kHz center switching frequency; an external resistor to GND programs Fsw per Fsw(kHz)=5326/Rclk(kΩ). Absolute max input voltage 5.5 V.
2	GND	power_in	Chip ground reference for internal analog and logic circuitry.
3	VCC	power_in	Main supply input (VIN). Recommended operating range 6.5 V-30 V (abs max 34 V). Place a ≥1 µF (typ. 10 µF/25 V) decoupling capacitor between VIN and GND as close to the pin as possible.
4	EN	input	Enable input. Floating or high enables the device (internal pull-up resistor); a logic low disables it. VEN(ON) typ. 1.2 V, hysteresis typ. 1.0 V. Abs max 34 V.
5	VD2	output	Transformer drive output 2 (half-bridge output, complementary to VD1). Drives one leg of the integrated PMOS/NMOS bridge into the transformer primary. Abs max 34 V, peak current 1.6 A, current-limit typ. 670 mA.
6	NC	unconnected	No internal connection. Leave floating or tie to a copper pour for mechanical support.
7	NC	unconnected	No internal connection. Leave floating or tie to a copper pour for mechanical support.
8	VD1	output	Transformer drive output 1 (half-bridge output, complementary to VD2). Drives one leg of the integrated PMOS/NMOS bridge into the transformer primary. Abs max 34 V, peak current 1.6 A, current-limit typ. 670 mA.
9	EP	power_in	Exposed thermal pad. Internally connected to GND; solder to a large ground copper area for improved thermal dissipation. Not intended as an electrical connection point beyond GND.

Key specifications

Parameter	Value
Manufacturer	coileasy
Package	ESOP-8
Category	Power Management (PMIC)
Pins	9

Ordering variants

Same part, different packaging or reel option.

CMP6793RE

CAD (KiCad official)

Symbol: CMP6793RE
Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
3D model: ESOP-8 (KiCad packages3D, STEP)
3D model files: cmp6793re-etched.step / cmp6793re-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cmp6793re.step / cmp6793re.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: coileasy datasheet (15 pp, sha256 b7a234026158dbc4, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF