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docs cmp6510v: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers cmp6510v: viewers · Ray 1mo ago
cmp6510v-etched.fit.json cmp6510v: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
cmp6510v-etched.glb cmp6510v: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
cmp6510v-etched.step cmp6510v: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
cmp6510v.glb Publish 0.1.0 · Ray 1mo ago
cmp6510v.kicad_mod Publish 0.1.0 · Ray 1mo ago
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cmp6510v.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json cmp6510v: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md cmp6510v: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

CMP6510V

coileasy · Transformer Drivers · SOT-23-6

CMP6510V from coileasy, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection. Leave floating or tie to a non-critical net; no bond wire inside the package.
2 GND power_in Device ground. Common return for the internal analog reference/oscillator and for the low-side of the push-pull power stage. Route with a short, low-impedance connection to the VIN decoupling capacitor.
3 NC unconnected No internal connection. Leave floating or tie to a non-critical net; no bond wire inside the package.
4 VB2 output Push-pull driver output 2. Drain of the internal N-MOSFET Q2 (RDS(on) ≈ 0.16 Ω typ). Connects to one end of the primary winding of the isolation transformer; swings between GND and ~2×VIN. Absolute-max rating -0.3 V to 24 V, current-limited to ~1.4 A.
5 VIN power_in Supply input, 2.8 V to 5.5 V (abs-max 6.5 V). Powers the internal reference, oscillator and the drains of the push-pull MOSFETs via the transformer center-tap. Place a ≥1 µF decoupling capacitor from VIN to GND as close to the pin as possible. UVLO turn-on ≈ 2.65 V typ with ~0.4 V hysteresis.
6 VB1 output Push-pull driver output 1. Drain of the internal N-MOSFET Q1 (RDS(on) ≈ 0.16 Ω typ). Connects to the opposite end of the primary winding of the isolation transformer; swings between GND and ~2×VIN complementary to VB2. Absolute-max rating -0.3 V to 24 V, current-limited to ~1.4 A.

Key specifications

Parameter Value
Manufacturer coileasy
Package SOT-23-6
Category Power Management (PMIC)
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • CMP6510V

CAD (KiCad official)

  • Symbol: CMP6510V
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: cmp6510v-etched.step / cmp6510v-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cmp6510v.step / cmp6510v.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: coileasy datasheet (13 pp, sha256 560ea33aa75ceb30, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF