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CMP4N65

Public Made by Adom

by adom

Cmos MOSFETs, TO-220. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CMP4N65

Cmos · MOSFETs · TO-220

CMP4N65 from Cmos, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limited to ±30 V (VGSS), threshold 2.5 V to 4.5 V at VDS = VGS, ID = 250 µA.
2 D passive Drain; drain-source voltage rated 650 V (VDSS) with 4 A continuous drain current limited by junction temperature, and 12 A pulsed.
3 S passive Source; connects to the source of the N-channel MOSFET, with a maximum continuous body-diode forward current of 4 A.

Key specifications

Parameter Value
Manufacturer Cmos
Package TO-220
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 650 V VGS = 0 V, ID = 250 µA 2
Zero Gate Voltage Drain Current IDSS 10 µA VDS = 650 V, VGS = 0 V 2
Gate-Body Leakage Current, Forward IGSSF 100 nA VGS = 30 V, VDS = 0 V 2
Gate-Body Leakage Current, Reverse IGSSR -100 nA VGS = -30 V, VDS = 0 V 2
Gate Threshold Voltage VGS(th) 2.5 4.5 V VDS = VGS, ID = 250 µA 2
Static Drain-Source On-Resistance RDS(on) 2.6 Ω VGS = 10 V, ID = 2A 2
Maximum Continuous Drain-Source Diode Forward Current IS 4 A 2
Maximum Pulsed Drain-Source Diode Forward Current ISM 12 A 2
Drain-Source Diode Forward Voltage VSD 1 V VGS = 0 V, IS = 1A 2
Drain-Source Voltage VDSS 650 V TC = 25°C 1
Drain Current - Continuous (TC = 100°C) ID 2.6 A TC = 100°C 1
Drain Current - Pulsed IDM 12 A TC = 25°C 1
Gate-Source Voltage VGSS -30 30 V TC = 25°C 1
Avalanche Current IAR 4 A TC = 25°C 1
Power Dissipation PD 100 W TC = 25°C 1
Operating and Storage Temperature Range TJ, TSTG -25 150 °C 1
Maximum lead temperature for soldering TL 300 °C 1/8 from case for 5 seconds 1
Thermal Resistance, Junction-to-Case RθJC 3.5 °C/W 1
Thermal Resistance, Junction-to-Ambient RθJA 62 °C/W Steady State 1
Breakdown Voltage Temperature Coefficient △BVDSS/△TJ 0.69 V/°C ID = 1mA, Referenced to 25°C 2
Forward Transconductance gFS 3 S VDS = 15 V, ID =2A 2
Input Capacitance Ciss 800 pF VDS = 25 V, VGS = 0 V, f = 1.0 MHz 2
Output Capacitance Coss 60 pF VDS = 25 V, VGS = 0 V, f = 1.0 MHz 2
Reverse Transfer Capacitance Crss 4 pF VDS = 25 V, VGS = 0 V, f = 1.0 MHz 2
Turn-On Delay Time td(on) 15 ns VDD = 300 V, VGS=10V, ID = 1A, RG = 10Ω 2
Turn-On Rise Time tr 20 ns VDD = 300 V, VGS=10V, ID = 1A, RG = 10Ω 2
Turn-Off Delay Time td(off) 30 ns VDD = 300 V, VGS=10V, ID = 1A, RG = 10Ω 2
Turn-Off Fall Time tf 30 ns VDD = 300 V, VGS=10V, ID = 1A, RG = 10Ω 2
Total Gate Charge Qg 18 nC VDS = 520V, ID = 1A, VGS = 10 V 2
Gate-Source Charge Qgs 5 nC VDS = 520V, ID = 1A, VGS = 10 V 2
Gate-Drain Charge Qgd 6 nC VDS = 520V, ID = 1A, VGS = 10 V 2
Reverse Recovery Time trr 200 ns IF = 1A, dI / dt = 100 A/µs 2
Reverse Recovery Charge Qrr 580 nC IF = 1A, dI / dt = 100 A/µs 2

CAD (KiCad official)

  • Symbol: CMP4N65
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: cmp4n65-etched.step / cmp4n65-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cmp4n65.step / cmp4n65.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cmos datasheet (2 pp, sha256 710ffe2cbcae2dbe, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF