# CMP40N20P

**Cmos(广东场效应半导体)** · IC · TO-220

CMP40N20P from Cmos(广东场效应半导体), in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; the gate-source voltage is rated at ±20 V (VGS). |
| 2 | D | passive | Drain terminal; rated at 200 V drain-source voltage (VDS) with 40 A continuous drain current at TC=25℃. |
| 3 | S | passive | Source terminal; rated at 40 A continuous source current (IS) and 160 A pulsed source current (ISM). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Cmos(广东场效应半导体) |
| Package | TO-220 |
| Category |  |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS |  |  | 200 | V |  | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Continuous Drain Current | ID |  |  | 40 | A | TC=25℃ | 1 |
| Continuous Drain Current | ID |  |  | 26 | A | TC=100℃ | 1 |
| Pulsed Drain Current | IDM |  |  | 160 | A |  | 1 |
| Single Pulse Avalanche Energy | EAS |  |  | 1000 | mJ | VDD=80V, VGS=10V, L=5mH, IAS=20A (note 1) | 1 |
| Total Power Dissipation | PD |  |  | 160 | W | TC=25℃ | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | ℃ |  | 1 |
| Operating Junction Temperature Range | TJ | -55 |  | 150 | ℃ |  | 1 |
| Thermal Resistance Junction-ambient | RθJA |  |  | 62.5 | ℃/ W |  | 1 |
| Thermal Resistance Junction-case | RθJC |  |  | 0.78 | ℃/ W |  | 1 |
| Drain-Source Breakdown Voltage | BVDSS | 200 |  |  | V | VGS=0V, ID=250uA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  | 58 | 65 | mΩ | VGS=10V, ID=20A | 2 |
| Gate Threshold Voltage | VGS(th) | 2 |  | 4 | V | VGS=VDS, ID=250uA | 2 |
| Drain-Source Leakage Current | IDSS |  |  | 1 | uA | VDS=200V, VGS=0V | 2 |
| Gate-Source Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Continuous Source Current | IS |  |  | 40 | A |  | 2 |
| Pulsed Source Current | ISM |  |  | 160 | A | VG=VD=0V, Force Current | 2 |
| Diode Forward Voltage | VSD |  |  | 1.4 | V | VGS=0V, IF=40A, TJ=25℃ | 2 |

## CAD (KiCad official)

- Symbol: `CMP40N20P`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files: `cmp40n20p-etched.step` / `cmp40n20p-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cmp40n20p.step` / `cmp40n20p.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Cmos(广东场效应半导体) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757923280089165824) (5 pp, sha256 `060c541c76944727`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cmp40n20p-datasheet.pdf)