component

CMP10N60

Public Made by Adom

by adom

Cmos MOSFETs, TO-220. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttriode-mos tube-transistorcmp10n60factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 11d ago
viewers cmp10n60: viewers · Ray 11d ago
cmp10n60-etched.glb Publish 0.1.0 · Ray 11d ago
cmp10n60-etched.step cmp10n60: factory component page (tier=lcsc) · Ray 11d ago
cmp10n60-hero.glb cmp10n60: hero GLB from the etched model (keeps the MPN mark) · Ray 11d ago
cmp10n60-hero.overlay.json Publish 0.1.0 · Ray 11d ago
cmp10n60.glb Publish 0.1.0 · Ray 11d ago
cmp10n60.kicad_mod Publish 0.1.0 · Ray 11d ago
cmp10n60.kicad_sym Publish 0.1.0 · Ray 11d ago
cmp10n60.lbr Publish 0.1.0 · Ray 11d ago
cmp10n60.step Publish 0.1.0 · Ray 11d ago
package.json Publish 0.1.0 · Ray 11d ago
page.json Set visibility: public · Ray 11d ago
README.md Publish 0.1.0 · Ray 11d ago

CMP10N60

Cmos · MOSFETs · TO-220

CMP10N60 from Cmos, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal of the MOSFET, with gate-source voltage rated at ±30 V (VGSS).
2 D passive Drain terminal, rated for 600 V drain-source voltage (VDSS) and 10 A continuous drain current at TC = 25℃.
3 S passive Source terminal, the reference for the gate-source voltage and the drain-source breakdown test condition (VGS = 0 V).

Key specifications

Parameter Value
Manufacturer Cmos
Package TO-220
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 600 V 1
Gate-Source Voltage VGSS -30 30 V 1
Single Pulsed Avalanche Energy EAS 562 mJ 1
Repetitive Avalanche Energy EAR 16 mJ 1
Peak Diode Recovery dv/dt dv/dt 5 V/ns 1
Operating and Storage Temperature Range TJ, TSTG -55 150 ℃ 1
Maximum lead temperature for soldering TL 300 ℃ 1/8 from case for 5 seconds 1
Thermal Resistance, Junction-to-Ambient RθJA 62.5 ℃/W 1
Thermal Resistance, Case-to-Sink RθCS 0.5 ℃/W 1
Drain-Source Breakdown Voltage BVDSS 600 V VGS = 0 V, ID = 250 µA 2
Breakdown Voltage Temperature Coefficient BVDSS / TJ 0.67 V/°C ID = 250 µA, Referenced to 25°C 2
Zero Gate Voltage Drain Current IDSS 10 µA VDS = 600 V, VGS = 0 V 2
Zero Gate Voltage Drain Current at high temperature IDSS 100 µA VDS = 480 V, TC=125°C 2
Gate-Body Leakage Current, Forward IGSSF 100 nA VGS = 30 V, VDS = 0 V 2
Gate-Body Leakage Current, Reverse IGSSR -100 nA VGS = -30 V, VDS = 0 V 2
Gate Threshold Voltage VGS(th) 2 4.5 V VDS = VGS, ID = 250 µA 2
Forward Transconductance gFS 8 S VDS = 25 V, ID = 5A 2
Input Capacitance Ciss 1800 pF VDS = 25 V, VGS = 0 V, f = 1.0 MHz 2
Output Capacitance Coss 138 pF VDS = 25 V, VGS = 0 V, f = 1.0 MHz 2
Reverse Transfer Capacitance Crss 21 pF VDS = 25 V, VGS = 0 V, f = 1.0 MHz 2
Total Gate Charge Qg 38 nC VDS = 480 V, ID = 10A, VGS = 10 V 2
Gate-Source Charge Qgs 7 nC VDS = 480 V, ID = 10A, VGS = 10 V 2
Gate-Drain Charge Qgd 16.7 nC VDS = 480 V, ID = 10A, VGS = 10 V 2
Maximum Continuous Drain-Source Diode Forward Current IS 10 A 2
Maximum Pulsed Drain-Source Diode Forward Current ISM 40 A 2
Drain-Source Diode Forward Voltage VSD 1.4 V VGS = 0 V, IS = 9A 2
Reverse Recovery Time trr 330 ns VGS = 0 V, IS = 4A, dIF / dt = 100 A/µs 2
Reverse Recovery Charge Qrr 2.2 µC VGS = 0 V, IS = 4A, dIF / dt = 100 A/µs 2

CAD (KiCad official)

  • Symbol: CMP10N60
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: cmp10n60-etched.step / cmp10n60-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cmp10n60.step / cmp10n60.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cmos datasheet (2 pp, sha256 53f72570d28ce42c, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF