# CM2220-MSOTA

**CIMO** · Analog To Digital Converters (ADC) · MSOP-10

CM2220-MSOTA from CIMO, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF | input | Reference voltage input, specified at 2.4 V to 5.1 V; a 10 µF decoupling capacitor should be connected between REF and GND. |
| 2 | VDD | power_in | Core supply voltage, specified at 1.71 V to 1.89 V with 1.8 V typical. |
| 3 | IN+ | input | Positive analog input; the converter samples the voltage difference IN+ minus IN- over a 0 V to VREF range. |
| 4 | IN- | input | Analog input reference ground, the negative input of the pseudo-differential pair. |
| 5 | GND | power_in | Ground reference for the device. |
| 6 | CNV | input | Conversion start: a rising edge starts a conversion, and the CNV level also selects the interface mode, with SDO enabled when CNV is low in chip-select mode and data read while CNV is high in cascade mode. |
| 7 | SDO | output | Serial data output carrying the conversion result, synchronized with SCLK. |
| 8 | SCLK | input | Serial clock input; in cascade mode, SCLK high during the CNV rising edge enables the busy indication. |
| 9 | SDI | input | Serial data input; low at the CNV rising edge selects cascade mode (data delayed 16 SCLK cycles to SDO), while high selects chip-select mode, where SDI low enables SDO. |
| 10 | VIO | power_in | Digital interface supply, specified at 1.71 V to 5.5 V and set to match the host logic level (1.8 V, 2.5 V, 3 V or 5 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | CIMO |
| Package | MSOP-10 |
| Category | Data Acquisition |
| Pins | 10 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DNL, VREF = 5V | DNL | -0.9 | 0.4 | 0.9 | LSB | VREF = 5V | 6 |
| DNL, VREF = 2.5V (printed as ±0.5, no column given) | DNL | -0.5 |  | 0.5 | LSB | VREF = 2.5V | 6 |
| INL, VREF = 5V | INL | -1.5 | 0.6 | 1.5 | LSB | VREF = 5V | 6 |
| INL, VREF = 2.5V (printed as ±1.2, no column given) | INL | -1.2 |  | 1.2 | LSB | VREF = 2.5V | 6 |
| Gain error |  |  | 0.001 | 0.005 | %FS |  | 6 |
| Gain error temperature drift |  | -0.36 |  | 0.36 | ppm/℃ |  | 6 |
| Zero-code error |  | -3 | 1 | 3 | LSB |  | 6 |
| Dynamic range, VREF = 5V |  | 90 | 92 |  | dB | VREF = 5V | 6 |
| SNR | SNR | 90 | 91.5 |  | dB | fIN = 1kHz，VREF = 5V | 6 |
| SNDR | SNDR | 89.5 | 91 |  | dB | fIN = 1kHz，VREF = 5V | 6 |
| Analog input voltage range (IN+ - IN-) |  | 0 |  |  | V |  | 6 |
| Absolute input voltage IN+ |  | -0.1 |  |  | V |  | 6 |
| Absolute input voltage IN- |  | -0.1 |  | 0.1 | V |  | 6 |
| Reference voltage range |  | 2.4 |  | 5.1 | V |  | 6 |
| Low-level input voltage VIL, VIO > 3V | VIL | -0.3 |  |  | V | VIO > 3V | 6 |
| Low-level input voltage VIL, VIO ≤ 3V | VIL | -0.3 |  |  | V | VIO ≤ 3V | 6 |
| Digital input leakage current, low | IIL | -1 |  | 1 | μA |  | 7 |
| Digital input leakage current, high | IIH | -1 |  | 1 | μA |  | 7 |
| Low-level output voltage | VOL |  |  | 0.4 | V | ISINK = 500μA | 7 |
| Supply voltage VDD | VDD | 1.71 | 1.8 | 1.89 | V |  | 7 |
| Digital interface supply voltage VIO | VIO | 1.71 |  | 5.5 | V |  | 7 |
| Total power |  |  | 5.2 | 7 | mW | fS = 1MSPS | 7 |
| Power, VDD only |  |  | 3.5 | 4 | mW | fS = 1MSPS | 7 |
| Operating temperature |  | -40 |  | 125 | °C |  | 5 |
| Storage temperature |  | -65 |  | 150 | °C |  | 5 |
| Junction temperature |  |  |  | 150 | °C |  | 5 |
| Lead soldering temperature (10 s to 30 s) |  |  |  | 240 | °C |  | 5 |
| Lead-free soldering temperature |  |  |  | 260 | °C |  | 5 |
| REF, VIO to GND |  | -0.3 |  | 6 | V |  | 5 |
| VDD to GND |  | -0.3 |  | 2 | V |  | 5 |
| VDD to VIO |  | -6 |  | 2.3 | V |  | 5 |
| IN+, IN- to GND |  | -0.3 |  |  | V |  | 5 |
| Digital input voltage to GND |  | -0.3 |  |  | V |  | 5 |
| Digital output voltage to GND |  | -0.3 |  |  | V |  | 5 |
| ESD HBM |  |  |  | 2000 | V |  | 5 |
| ESD CDM |  |  |  | 750 | V |  | 5 |

## CAD (KiCad official)

- Symbol: `CM2220-MSOTA`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `cm2220-msota-etched.step` / `cm2220-msota-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cm2220-msota.step` / `cm2220-msota.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [CIMO datasheet](docs/cm2220-msota-datasheet.pdf) (23 pp, sha256 `61ae2a1faabdd92a`, retrieved 2026-10-30, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cm2220-msota-datasheet.pdf)