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CM2219-QFNTR
Public Made by Adomby adom
CIMO Analog To Digital Converters (ADC), QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCM2219-QFNTR
CIMO · Analog To Digital Converters (ADC) · QFN-20-EP(4x4)
CM2219-QFNTR from CIMO, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Power supply, typically 4.5 V to 5.5 V; decouple with 10 μF and 100 nF capacitors. |
| 2 | REF | bidirectional | Reference input/output: outputs 4.096 V when the internal reference is enabled, buffers REFIN (max VDD-0.5 V) when the buffer is enabled, or accepts an external reference of 0.5 V to VDD; must be decoupled with 10 μF placed as close to the pin as possible. |
| 3 | REFIN | bidirectional | Internal unbuffered reference output when the internal reference is used (decouple with 0.1 μF), or external reference input of 0.5 V to 4.096 V that is buffered out on REF. |
| 4 | GND | power_in | Ground. |
| 5 | GND | power_in | Ground. |
| 6 | IN4 | passive | Analog input channel 4; in unipolar mode the positive input must stay between -0.1 V and VREF+0.1 V. |
| 7 | IN5 | passive | Analog input channel 5; in unipolar mode the positive input must stay between -0.1 V and VREF+0.1 V. |
| 8 | IN6 | passive | Analog input channel 6; in unipolar mode the positive input must stay between -0.1 V and VREF+0.1 V. |
| 9 | IN7 | passive | Analog input channel 7; in unipolar mode the positive input must stay between -0.1 V and VREF+0.1 V. |
| 10 | COM | passive | Common input to which all IN[7:0] can be referenced; connect to 0 V or VREF/2, with COM limited to 0.1 V of ground (unipolar) or VREF/2 ±0.1 V (pseudo-bipolar). |
| 11 | CNV | input | Conversion input: a rising edge starts a conversion, and low level enables the SDO output as chip select. |
| 12 | DIN | input | SPI serial data input used to write the 14-bit configuration register, sampled on SCK rising edges. |
| 13 | SCK | input | SPI serial clock input. |
| 14 | SDO | output | SPI serial data output; forced to high impedance when CNV is high. |
| 15 | VIO | power_in | Digital interface supply, normally the same as the host interface supply (1.8 V, 2.5 V, 3 V or 5 V); electrical specification allows 1.8 V to VDD+0.3 V. |
| 16 | IN0 | passive | Analog input channel 0; in unipolar mode the positive input must stay between -0.1 V and VREF+0.1 V. |
| 17 | IN1 | passive | Analog input channel 1; in unipolar mode the positive input must stay between -0.1 V and VREF+0.1 V. |
| 18 | IN2 | passive | Analog input channel 2; in unipolar mode the positive input must stay between -0.1 V and VREF+0.1 V. |
| 19 | IN3 | passive | Analog input channel 3; in unipolar mode the positive input must stay between -0.1 V and VREF+0.1 V. |
| 20 | VDD | power_in | Power supply, typically 4.5 V to 5.5 V; decouple with 10 μF and 100 nF capacitors. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CIMO |
| Package | QFN-20-EP(4x4) |
| Category | Data Acquisition |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating temperature | -40 | 125 | °C | 8 | |||
| Storage temperature | -65 | 150 | °C | 8 | |||
| Junction temperature | 150 | °C | 8 | ||||
| Lead soldering temperature (10 s to 30 s) | 240 | °C | 8 | ||||
| Lead-free soldering temperature | 260 | °C | 8 | ||||
| Analog input voltage | -0.3 | V | Upper limit printed as VDD | 8 | |||
| VDD to GND | VDD | -0.3 | 7 | V | 8 | ||
| VDD to VIO | VDD-VIO | -7 | 7 | V | 8 | ||
| DIN, CNV, SCK, SDO to GND | -0.3 | V | Upper limit printed as VIO+0.3 | 8 | |||
| ESD HBM | 5000 | V | 8 | ||||
| ESD CDM | 2000 | V | 8 | ||||
| Full-bandwidth conversion rate | 0 | 500 | kSPS | Full bandwidth | 9 | ||
| 1/4-bandwidth conversion rate | 0 | 125 | kSPS | 1/4 bandwidth | 9 | ||
| INL | INL | -2.5 | 0.6 | 2.5 | LSB | 9 | |
| DNL | DNL | -1 | 0.4 | 1 | LSB | 9 | |
| Gain error, all modes | -4 | 0.5 | 4 | LSB | All modes | 9 | |
| Gain error matching | 0.8 | 3 | LSB | 9 | |||
| Gain error temperature drift | -0.5 | 0.5 | ppm/℃ | 9 | |||
| Offset error, all modes | -2 | 0.5 | 2 | LSB | All modes | 9 | |
| Offset error matching | 2 | 2.5 | LSB | 9 | |||
| Offset error temperature drift | -0.3 | 0.3 | ppm/℃ | 9 | |||
| Internal reference REF output voltage | REF | 4.086 | 4.096 | 4.106 | V | TA = 25°C | 9 |
| Internal reference REF output current | REF | -300 | 300 | μA | 9 | ||
| Internal reference temperature drift | -10 | 10 | ppm/℃ | 9 | |||
| External reference voltage range, REF input | REF | 0.5 | V | Upper limit printed as VDD+0.3 | 9 | ||
| External reference voltage range, REFIN input (buffered) | REFIN | 0.5 | V | Upper limit printed as VDD-0.2 | 9 | ||
| Unipolar analog input voltage range | 0 | V | Unipolar mode; upper limit printed as VREF | 10 | |||
| Absolute positive input voltage | -0.1 | V | Positive input, unipolar and pseudo-bipolar modes; upper limit printed as VREF+0.1 | 10 | |||
| Absolute negative input or COM voltage | -0.1 | 0.1 | V | Negative input or COM input, unipolar mode | 10 | ||
| Supply voltage VDD | VDD | 4.5 | 5.5 | V | 9 | ||
| Digital interface supply VIO | VIO | 1.8 | V | Upper limit printed as VDD+0.3 | 10 | ||
| Digital input low voltage | VIL | -0.3 | V | Upper limit printed as 0.3VIO | 10 | ||
| Digital output low voltage | VOL | 0.4 | V | ISINK = 500μA | 10 | ||
| Input leakage current low | IIL | -1 | 1 | μA | 10 | ||
| Input leakage current high | IIH | -1 | 1 | μA | 10 | ||
| Power dissipation, 500 kSPS, external reference | 18 | 19 | mW | VDD = 5V, 500kSPS | 10 | ||
| Power dissipation, 500 kSPS, internal reference | 25 | 26 | mW | VDD = 5V, 500kSPS, internal reference | 10 | ||
| SCLK falling edge data hold time | tSDOHD | 8 | 8.8 | 21.4 | ns | 11 | |
| SCLK falling edge to data valid | tSDOD | 8 | 10.5 | 15.4 | ns | VIO = 5.5V | 11 |
| SCLK falling edge to data valid | tSDOD | 9.2 | 15.7 | 18 | ns | VIO = 3.3V | 11 |
| SCLK falling edge to data valid | tSDOD | 14 | 20 | 29 | ns | VIO = 1.8V | 11 |
| CNV low to SDO MSB valid | tEN | 10.1 | 12.9 | 18.4 | ns | VIO = 5.5V | 11 |
| CNV low to SDO MSB valid | tEN | 11.3 | 14 | 21 | ns | VIO = 3.3V | 11 |
| CNV low to SDO MSB valid | tEN | 16.2 | 22.2 | 32 | ns | VIO = 1.8V | 11 |
| CNV high or last SCLK falling edge to SDO high-Z | tDIS | 11 | 15 | 33 | ns | 11 |
CAD (KiCad official)
- Symbol:
CM2219-QFNTR - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
cm2219-qfntr-etched.step/cm2219-qfntr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cm2219-qfntr.step/cm2219-qfntr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: CIMO datasheet (29 pp, sha256
fccccf31d7653135, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).