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CM1371-DAT

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iCM(创芯微) Battery Management, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CM1371-DAT

iCM(创芯微) · Battery Management · TSSOP-16

CM1371-DAT from iCM(创芯微), in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Positive power supply input and positive terminal connection for battery 1; absolute maximum rating is VSS-0.3 V to VSS+40 V.
2 VC1 power_in Positive voltage connection for battery 1; cell-voltage sense input with absolute maximum rating VSS-0.3 V to VSS+40 V.
3 VC2 power_in Negative voltage connection for battery 1 and positive voltage connection for battery 2; cell-voltage sense input with absolute maximum rating VSS-0.3 V to VSS+40 V.
4 VC3 power_in Negative voltage connection for battery 2 and positive voltage connection for battery 3; cell-voltage sense input with absolute maximum rating VSS-0.3 V to VSS+40 V.
5 VC4 power_in Negative voltage connection for battery 3 and positive voltage connection for battery 4; cell-voltage sense input with absolute maximum rating VSS-0.3 V to VSS+40 V.
6 VC5 power_in Negative voltage connection for battery 4 and positive voltage connection for battery 5; cell-voltage sense input with absolute maximum rating VSS-0.3 V to VSS+40 V.
7 VC6 power_in Negative voltage connection for battery 5 and positive voltage connection for battery 6; cell-voltage sense input with absolute maximum rating VSS-0.3 V to VSS+40 V.
8 VC7 power_in Negative voltage connection for battery 6 and positive voltage connection for battery 7; cell-voltage sense input with absolute maximum rating VSS-0.3 V to VSS+40 V.
9 VSS power_in Chip ground and negative voltage connection for battery 7.
10 TEC passive Discharge overcurrent delay adjustment terminal, where an external capacitor CTEC sets TEC1 = 10 × CTEC (nF) ms; absolute maximum rating is VSS-0.3 V to VSS+5.5 V.
11 RTS input Connects the NTC thermistor for temperature detection; absolute maximum rating is VSS-0.3 V to VCC+0.3 V.
12 RTV passive Connects a resistor to the RTS terminal to set the protection temperature (RT = 3 × NTC resistance at TCH); absolute maximum rating is VSS-0.3 V to VSS+5.5 V.
13 VINI input Overcurrent detection input for the discharge and charge current sense voltage; absolute maximum rating is VSS-0.3 V to VCC+0.3 V.
14 DO output Discharge MOSFET control output that is driven to turn the discharge MOS off on overdischarge, overcurrent, short-circuit or other protection; absolute maximum rating is VSS-0.3 V to VCC+0.3 V.
15 CO output Charge MOSFET control output that is driven to turn the charge MOS off on overcharge, overcurrent or other protection; absolute maximum rating is VSS-15 V to VCC+0.3 V.
16 VM input Charger and load detection terminal; absolute maximum rating is VSS-15 V to VCC+0.3 V.

Key specifications

Parameter Value
Manufacturer iCM(创芯微)
Package TSSOP-16
Category Power Management (PMIC)
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Normal operating current IVCC 10 15 μA VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V 6
Overcharge protection voltage VOC 4.235 4.25 4.265 V VCn - VCn+1 = 3.5V, VC7-VSS = 3.5 → 4.4V 6
Overcharge release voltage VOCR 4.12 4.15 4.18 V VCn - VCn+1 = 3.5V, VC7-VSS = 4.4 → 3.5V 6
Overcharge protection delay TOC 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC7-VSS = 3.5 → 4.4V 6
Overcharge release delay TOCR 128 256 384 ms VCn - VCn+1 = 3.5V, VC7-VSS = 4.4 → 3.5V 6
Balancing start voltage VBAL 4.1 4.125 4.15 V VCn - VCn+1 = 3.5V, VC7-VSS = 3.5 → 4.4V 6
Overdischarge protection voltage VOD 2.65 2.7 2.75 V VCn - VCn+1 = 3.5V, VC7-VSS = 3.5 → 2.0V 6
Overdischarge release voltage VODR 2.92 3 3.08 V VCn - VCn+1 = 3.5V, VC7-VSS = 2.0 → 3.5V 6
Overdischarge protection delay TOD 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC7-VSS = 3.5 → 2.0V 6
Overdischarge release delay TODR 128 256 384 ms VCn - VCn+1 = 3.5V, VC7-VSS = 2.0 → 3.5V 6
Low-voltage charge inhibit voltage VLV 1.2 1.5 1.8 V VCn - VCn+1 = 3.5V, VC7-VSS = 3.5 → 1.2V 6
Low-voltage charge inhibit release voltage VLVR 1.22 1.52 1.82 V VCn - VCn+1 = 3.5V, VC7-VSS = 1.2 → 3.5V 6
Low-voltage charge inhibit delay TLV 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC7-VSS = 3.5 → 1.2V 6
Low-voltage charge inhibit release delay TLVR 128 256 384 ms VCn - VCn+1 = 3.5V, VC7-VSS = 1.2 → 3.5V 6
Discharge overcurrent 1 protection voltage VEC1 0.045 0.05 0.055 V VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0 → 0.18V 6
Discharge overcurrent 1 protection delay TEC1 0.5 1 1.5 s VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0 → 0.18V, CTEC=0.1μF 6
Discharge overcurrent 2 protection voltage VEC2 0.085 0.1 0.115 V VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0 → 0.35V 6
Discharge overcurrent 2 protection delay TEC2 50 100 150 ms VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0 → 0.35V, CTEC=0.1μF 6
Short-circuit protection voltage VSHORT 0.16 0.2 0.24 V VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0 → 0.8V 7
Short-circuit protection delay TSHORT 100 300 500 μs VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0 → 0.8V 7
Discharge overcurrent release delay TECR 22 32 42 ms VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0.8 → 0V 7
Charge overcurrent protection voltage VCHA -0.03 -0.025 -0.02 V VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0 → -1.0V 7
Charge overcurrent protection delay TCHA 180 256 332 ms VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0 → -1.0V 7
Charge overcurrent release delay TCHAR 45 64 83 ms VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = -1V → 0V 7
Open-wire protection delay TOW 4 s CVC1~7=0.1μF 7
Discharge state detection voltage VSTS 1 4 7 mV VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0 → 10mV 8
Discharge state detection delay TSTS 3 4.5 6 ms VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, VINI = 0 → 10mV 8
Sleep delay TSLP 22 32 42 s VCn - VCn+1 = 3.5V, VC7-VSS = 3.5 → 1.5V 8
Charge high-temperature protection delay DTCH 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, RNTC = 100k → 10k 7
Charge high-temperature release delay DTCHR 90 128 166 ms VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, RNTC = 10k → 100k 7
Discharge high-temperature protection delay DTDH 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, RNTC = 100k → 10k 7
Discharge high-temperature release delay DTDHR 90 128 166 ms VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, RNTC = 10k → 100k 7
Charge low-temperature protection delay DTCL 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, RNTC = 100k → 3M 7
Charge low-temperature release delay DTCLR 90 128 166 ms VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, RNTC = 3M → 100k 8
Discharge low-temperature protection delay DTDL 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, RNTC = 100k → 3M 8
Discharge low-temperature release delay DTDLR 90 128 166 ms VCn - VCn+1 = 3.5V, VC7-VSS = 3.5V, RNTC = 3M → 100k 8
Supply voltage (VCC to VSS) VCC -0.3 40 V Referenced to VSS: VSS-0.3 ~ VSS+40 5
Input voltage 0 (VCn cell terminals) VCELL -0.3 40 V Terminal VCn; referenced to VSS: VSS-0.3 ~ VSS+40 5
Input voltage 1 (RTV, TEC) VIN1 -0.3 5.5 V Terminals RTV, TEC; referenced to VSS: VSS-0.3 ~ VSS+5.5 5
Input voltage 2 (VM, CO) VIN2 -15 V Terminals VM, CO; min referenced to VSS, max printed as VCC+0.3 5
Input voltage 3 (DO, RTS, VINI) VIN3 -0.3 V Terminals DO, RTS, VINI; min referenced to VSS, max printed as VCC+0.3 5
Operating ambient temperature TOPR -40 85 °C 5
Storage temperature range TSTG -55 125 °C 5

CAD (KiCad official)

  • Symbol: CM1371-DAT
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: cm1371-dat-etched.step / cm1371-dat-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cm1371-dat.step / cm1371-dat.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: iCM(创芯微) datasheet (20 pp, sha256 5c70006d1f34a76b, retrieved 2026-10-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF