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CM1341-FKT

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iCM(创芯微) , TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CM1341-FKT

iCM(创芯微) · IC · TSSOP-16

CM1341-FKT from iCM(创芯微), in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Positive supply input and positive voltage connection for battery 1; absolute maximum rating is VSS-0.3 V to VSS+40 V.
2 VNC passive Printed as VNC but described in the pin table as a battery 1 positive voltage connection terminal; cell inputs are rated VSS-0.3 V to VSS+40 V.
3 VNC passive Printed as VNC but described in the pin table as a battery 1 positive voltage connection terminal; cell inputs are rated VSS-0.3 V to VSS+40 V.
4 VNC passive Printed as VNC but described in the pin table as a battery 1 positive voltage connection terminal; cell inputs are rated VSS-0.3 V to VSS+40 V.
5 VC1 passive Battery 1 positive voltage connection for cell voltage detection and balancing; cell inputs are rated VSS-0.3 V to VSS+40 V.
6 VC2 passive Battery 1 negative and battery 2 positive voltage connection for cell voltage detection; cell inputs are rated VSS-0.3 V to VSS+40 V.
7 VC3 passive Battery 2 negative and battery 3 positive voltage connection for cell voltage detection; cell inputs are rated VSS-0.3 V to VSS+40 V.
8 VC4 passive Battery 3 negative and battery 4 positive voltage connection for cell voltage detection; cell inputs are rated VSS-0.3 V to VSS+40 V.
9 VSS power_in Chip ground and battery 4 negative voltage connection; all voltage limits are referenced to VSS.
10 TEC input Discharge overcurrent delay adjustment terminal, where an external CTEC sets TEC1 (TEC1 = 10 × CTEC in ms, CTEC in nF); absolute maximum is VSS-0.3 V to VSS+5.5 V.
11 RTS passive Connects the NTC thermistor (B value 3950, 100 kΩ at 25 °C) for temperature detection; absolute maximum is VSS-0.3 V to VCC+0.3 V.
12 RTV passive Connects the resistor to RTS that sets the high-temperature protection threshold (RT is 3× the NTC resistance at TCH); absolute maximum is VSS-0.3 V to VSS+5.5 V.
13 VINI input Overcurrent detection input that senses the discharge and charge current across the sense resistor; absolute maximum is VSS-0.3 V to VCC+0.3 V.
14 DO output Discharge MOSFET control output; high level is VCC-0.7 V for VCC < 12 V or 10.8 V for VCC > 12 V, and low level is VSS.
15 CO output Charge MOSFET control output; absolute maximum is VSS-15 V to VCC+0.3 V, and it goes Hi-Z at low level.
16 VM input Charger and load detection terminal; absolute maximum is VSS-15 V to VCC+0.3 V, with typical VM-VSS resistance of 50 kΩ.

Key specifications

Parameter Value
Manufacturer iCM(创芯微)
Package TSSOP-16
Category
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Normal operating current (Ta=+25°C) IVCC 10 15 μA VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V 6
Overcharge protection voltage (Ta=+25°C) VOC 4.235 4.25 4.265 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5 → 4.4V 6
Overcharge release voltage (Ta=+25°C) VOCR 4.12 4.15 4.18 V VCn - VCn+1 = 3.5V, VC4-VSS = 4.4 → 3.5V 6
Overcharge protection delay (Ta=+25°C) TOC 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC4-VSS = 3.5 → 4.4V 6
Overcharge release delay (Ta=+25°C) TOCR 128 256 384 ms VCn - VCn+1 = 3.5V, VC4-VSS = 4.4 → 3.5V 6
Balancing start voltage (Ta=+25°C) VBAL 4.1 4.125 4.15 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5 → 4.4V 6
Overdischarge protection voltage (Ta=+25°C) VOD 2.45 2.5 2.55 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5 → 2.0V 6
Overdischarge release voltage (Ta=+25°C) VODR 2.92 3 3.08 V VCn - VCn+1 = 3.5V, VC4-VSS = 2.0 → 3.5V 6
Overdischarge protection delay (Ta=+25°C) TOD 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC4-VSS = 3.5 → 2.0V 6
Overdischarge release delay (Ta=+25°C) TODR 128 256 384 ms VCn - VCn+1 = 3.5V, VC4-VSS = 2.0 → 3.5V 6
Low-voltage charge inhibit voltage (Ta=+25°C) VLV 1.2 1.5 1.8 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5 → 1.2V 6
Low-voltage charge inhibit release voltage (Ta=+25°C) VLVR 1.22 1.52 1.82 V VCn - VCn+1 = 3.5V, VC4-VSS = 1.2 → 3.5V 6
Low-voltage charge inhibit delay (Ta=+25°C) TLV 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC4-VSS = 3.5 → 1.2V 6
Low-voltage charge inhibit release delay (Ta=+25°C) TLVR 128 256 384 ms VCn - VCn+1 = 3.5V, VC4-VSS = 1.2 → 3.5V 6
Discharge overcurrent 1 protection voltage (Ta=+25°C) VEC1 0.045 0.05 0.055 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 0.18V 6
Discharge overcurrent 1 protection delay (Ta=+25°C) TEC1 0.5 1 1.5 s VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 0.18V, CTEC=0.1μF 6
Discharge overcurrent 2 protection voltage (Ta=+25°C) VEC2 0.085 0.1 0.115 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 0.35V 6
Discharge overcurrent 2 protection delay (Ta=+25°C) TEC2 50 100 150 ms VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 0.35V, CTEC=0.1μF 6
Short-circuit protection voltage (Ta=+25°C) VSHORT 0.16 0.2 0.24 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 0.8V 7
Short-circuit protection delay (Ta=+25°C) TSHORT 100 300 500 μs VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 0.8V 7
Discharge overcurrent release delay (Ta=+25°C) TECR 22 32 42 ms VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0.8 → 0V 7
Charge overcurrent protection voltage (Ta=+25°C) VCHA -0.03 -0.025 -0.02 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → -1.0V 7
Charge overcurrent protection delay (Ta=+25°C) TCHA 180 256 332 ms VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → -1.0V 7
Charge overcurrent release delay (Ta=+25°C) TCHAR 45 64 83 ms VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = -1V → 0V 7
Wire-break protection delay (Ta=+25°C) TOW 4 s CVC1~4=0.1μF 7
Charge high-temperature protection temperature TCH (±3 °C about RT-set nominal) (Ta=+25°C) TCH -3 3 °C VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 100k → 10k 7
Charge high-temperature release temperature TCHR (±3 °C) (Ta=+25°C) TCHR -3 3 °C VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 10k → 100k 7
Discharge high-temperature protection temperature TDH (±3 °C) (Ta=+25°C) TDH -3 3 °C VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 100k → 10k 7
Discharge high-temperature release temperature TDHR (±3 °C) (Ta=+25°C) TDHR -3 3 °C VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 10k → 100k 7
Charge high-temperature protection delay (Ta=+25°C) DTCH 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 100k → 10k 7
Charge high-temperature release delay (Ta=+25°C) DTCHR 90 128 166 ms VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 10k → 100k 7
Discharge high-temperature protection delay (Ta=+25°C) DTDH 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 100k → 10k 7
Discharge high-temperature release delay (Ta=+25°C) DTDHR 90 128 166 ms VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 10k → 100k 7
Charge low-temperature protection temperature TCL (±3 °C) (Ta=+25°C) TCL -3 3 °C VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 100k → 3M 7
Charge low-temperature release temperature TCLR (±3 °C) (Ta=+25°C) TCLR -3 3 °C VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 3M → 100k 7
Discharge low-temperature protection temperature TDL (±3 °C) (Ta=+25°C) TDL -3 3 °C VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 100k → 3M 7
Discharge low-temperature release temperature TDLR (±3 °C) (Ta=+25°C) TDLR -3 3 °C VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 3M → 100k 8
Charge low-temperature protection delay (Ta=+25°C) DTCL 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 100k → 3M 8
Charge low-temperature release delay (Ta=+25°C) DTCLR 90 128 166 ms VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 3M → 100k 8
Discharge low-temperature protection delay (Ta=+25°C) DTDL 0.7 1 1.3 s VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 100k → 3M 8
Discharge low-temperature release delay (Ta=+25°C) DTDLR 90 128 166 ms VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, RNTC = 3M → 100k 8
Discharge state detection voltage (Ta=+25°C) VSTS 1 4 7 mV VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 10mV 8
Discharge state detection delay (Ta=+25°C) TSTS 3 4.5 6 ms VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 10mV 8
Sleep entry delay (Ta=+25°C) TSLP 22 32 42 s VCn - VCn+1 = 3.5V, VC4-VSS = 3.5 → 1.5V 8
Normal operating current (Ta=-40~+85°C) IVCC 10 20 μA VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V 9
Overcharge protection voltage (Ta=-40~+85°C) VOC 4.21 4.25 4.29 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5 → 4.4V 9
Overcharge release voltage (Ta=-40~+85°C) VOCR 4.09 4.15 4.21 V VCn - VCn+1 = 3.5V, VC4-VSS = 4.4 → 3.5V 9
Overdischarge protection voltage (Ta=-40~+85°C) VOD 2.4 2.5 2.6 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5 → 2.0V 9
Overdischarge release voltage (Ta=-40~+85°C) VODR 2.85 3 3.15 V VCn - VCn+1 = 3.5V, VC4-VSS = 2.0 → 3.5V 9
Discharge overcurrent 1 protection voltage (Ta=-40~+85°C) VEC1 0.042 0.05 0.058 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 0.18V 9
Discharge overcurrent 2 protection voltage (Ta=-40~+85°C) VEC2 0.08 0.1 0.12 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 0.35V 9
Short-circuit protection voltage (Ta=-40~+85°C) VSHORT 0.14 0.2 0.26 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → 0.8V 10
Charge overcurrent protection voltage (Ta=-40~+85°C) VCHA -0.033 -0.025 -0.017 V VCn - VCn+1 = 3.5V, VC4-VSS = 3.5V, VINI = 0 → -1.0V 10
Supply voltage VCC (absolute maximum; limits referenced to VSS) VCC -0.3 40 V Terminal VCC; printed as VSS-0.3 ~ VSS+40 5
Input voltage 0, cell terminals VCn (absolute maximum; referenced to VSS) VCELL -0.3 40 V Terminals VCn (n=1~4); printed as VSS-0.3 ~ VSS+40 5
Input voltage 1, RTV and TEC (absolute maximum; referenced to VSS) VIN1 -0.3 5.5 V Terminals RTV, TEC; printed as VSS-0.3 ~ VSS+5.5 5
Input voltage 2, VM and CO (absolute maximum; max printed as VCC+0.3 V) VIN2 -15 V Terminals VM, CO; printed as VSS-15 ~ VCC+0.3 5
Input voltage 3, DO, RTS and VINI (absolute maximum; max printed as VCC+0.3 V) VIN3 -0.3 V Terminals DO, RTS, VINI; printed as VSS-0.3 ~ VCC+0.3 5
Operating ambient temperature (absolute maximum table) TOPR -40 85 °C 5
Storage temperature range TSTG -55 125 °C 5

CAD (KiCad official)

  • Symbol: CM1341-FKT
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: cm1341-fkt-etched.step / cm1341-fkt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cm1341-fkt.step / cm1341-fkt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: iCM(创芯微) datasheet (20 pp, sha256 a7dd58a197619b5f, retrieved 2026-11-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF