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CM1270-LCA-A
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iCM(创芯微) , MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CM1270-LCA-A
iCM(创芯微) · IC · MSOP-10
CM1270-LCA-A from iCM(创芯微), in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Chip supply terminal; the absolute maximum supply voltage is VSS-0.3 V to VSS+40 V. |
| 2 | VC1 | input | Positive voltage terminal of cell 1 for overcharge voltage detection; the cell-to-cell input voltage (VC1-VC2) is limited to 0 to 12 V absolute maximum. |
| 3 | VC2 | input | Positive voltage terminal of cell 2 and negative connection of cell 1; the cell input voltage (VC2-VC3) is limited to 0 to 12 V absolute maximum. |
| 4 | VC3 | input | Positive voltage terminal of cell 3 and negative connection of cell 2; the cell input voltage (VC3-VC4) is limited to 0 to 12 V absolute maximum. |
| 5 | VC4 | input | Positive voltage terminal of cell 4 and negative connection of cell 3; the cell input voltage (VC4-VC5) is limited to 0 to 12 V absolute maximum. |
| 6 | VC5 | input | Positive voltage terminal of cell 5 and negative connection of cell 4; the cell input voltage (VC5-VC6) is limited to 0 to 12 V absolute maximum. |
| 7 | VC6 | input | Positive voltage terminal of cell 6 and negative connection of cell 5; the cell input voltage (VC6-VC7) is limited to 0 to 12 V absolute maximum. |
| 8 | VC7 | input | Positive voltage terminal of cell 7 and negative connection of cell 6; the cell input voltage (VC7-VSS) is limited to 0 to 12 V absolute maximum. |
| 9 | VSS | power_in | Chip ground terminal, the reference for the supply and cell voltage limits. |
| 10 | CO | output | Charge-control connection that drives the external MOSFET for overcharge protection; the CO terminal voltage is limited to VSS-0.3 V to VCC+0.3 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | iCM(创芯微) |
| Package | MSOP-10 |
| Category | |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Normal operating current | IVCC | 3.5 | 6 | μA | V1=V2=V3=V4=V5=V6=V7=3.5V; Ta=+25°C | 7 | |
| Overcharge release voltage (printed as VOCR ±0.050 V; nominal VOCR not printed for this MPN) | VOCR | -0.05 | 0.05 | V | V1=V2=...=V7=3.5V, V1=4.4→3.5V; Ta=+25°C | 7 | |
| Overcharge protection delay (printed as TOC ±50%; catalog TOC = 1 s for CM1270-LCA-A) | TOC | -50 | 50 | % | V1=V2=...=V7=3.5V, V1=3.5→4.4V; Ta=+25°C | 7 | |
| Overcharge recovery delay | TOCR | 128 | 256 | 384 | ms | V1=V2=...=V7=3.5V, V1=4.4→3.5V; Ta=+25°C | 7 |
| Overcharge reset delay | TRST | 1 | 2.5 | 4 | ms | V1=V2=...=V7=3.5V, V1=3.5→4.4→3.5V; Ta=+25°C | 7 |
| Disconnect protection delay | TOW | 10 | 20 | 30 | ms | Ta=+25°C | 7 |
| Disconnect protection release delay | TOWR | 24 | 48 | 72 | ms | Ta=+25°C | 7 |
| Supply voltage (absolute maximum, referenced to VSS) | VCC | -0.3 | 40 | V | Referenced to VSS: printed as VSS-0.3 ~ VSS+40 V; Ta=+25°C unless noted | 6 | |
| Cell input voltage (absolute maximum, each cell VC1-VC2 ... VC7-VSS) | VCELL | 0 | 12 | V | VC1-VC2, VC2-VC3, VC3-VC4, VC4-VC5, VC5-VC6, VC6-VC7, VC7-VSS; Ta=+25°C unless noted | 6 | |
| CO output terminal voltage (absolute maximum) | VCO | -0.3 | 0.3 | V | Printed as VSS-0.3 ~ VCC+0.3 V: minimum offset is from VSS, maximum offset is from VCC; Ta=+25°C unless noted | 6 | |
| Operating ambient temperature | TOPR | -40 | 85 | °C | 6 | ||
| Storage temperature range | TSTG | -55 | 125 | °C | 6 |
CAD (KiCad official)
- Symbol:
CM1270-LCA-A - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
cm1270-lca-a-etched.step/cm1270-lca-a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cm1270-lca-a.step/cm1270-lca-a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: iCM(创芯微) datasheet (15 pp, sha256
bfdb452ec1827bd0, retrieved 2026-11-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CM1270-LCA-A
**iCM(创芯微)** · IC · MSOP-10
CM1270-LCA-A from iCM(创芯微), in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Chip supply terminal; the absolute maximum supply voltage is VSS-0.3 V to VSS+40 V. |
| 2 | VC1 | input | Positive voltage terminal of cell 1 for overcharge voltage detection; the cell-to-cell input voltage (VC1-VC2) is limited to 0 to 12 V absolute maximum. |
| 3 | VC2 | input | Positive voltage terminal of cell 2 and negative connection of cell 1; the cell input voltage (VC2-VC3) is limited to 0 to 12 V absolute maximum. |
| 4 | VC3 | input | Positive voltage terminal of cell 3 and negative connection of cell 2; the cell input voltage (VC3-VC4) is limited to 0 to 12 V absolute maximum. |
| 5 | VC4 | input | Positive voltage terminal of cell 4 and negative connection of cell 3; the cell input voltage (VC4-VC5) is limited to 0 to 12 V absolute maximum. |
| 6 | VC5 | input | Positive voltage terminal of cell 5 and negative connection of cell 4; the cell input voltage (VC5-VC6) is limited to 0 to 12 V absolute maximum. |
| 7 | VC6 | input | Positive voltage terminal of cell 6 and negative connection of cell 5; the cell input voltage (VC6-VC7) is limited to 0 to 12 V absolute maximum. |
| 8 | VC7 | input | Positive voltage terminal of cell 7 and negative connection of cell 6; the cell input voltage (VC7-VSS) is limited to 0 to 12 V absolute maximum. |
| 9 | VSS | power_in | Chip ground terminal, the reference for the supply and cell voltage limits. |
| 10 | CO | output | Charge-control connection that drives the external MOSFET for overcharge protection; the CO terminal voltage is limited to VSS-0.3 V to VCC+0.3 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | iCM(创芯微) |
| Package | MSOP-10 |
| Category | |
| Pins | 10 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Normal operating current | IVCC | | 3.5 | 6 | μA | V1=V2=V3=V4=V5=V6=V7=3.5V; Ta=+25°C | 7 |
| Overcharge release voltage (printed as VOCR ±0.050 V; nominal VOCR not printed for this MPN) | VOCR | -0.05 | | 0.05 | V | V1=V2=...=V7=3.5V, V1=4.4→3.5V; Ta=+25°C | 7 |
| Overcharge protection delay (printed as TOC ±50%; catalog TOC = 1 s for CM1270-LCA-A) | TOC | -50 | | 50 | % | V1=V2=...=V7=3.5V, V1=3.5→4.4V; Ta=+25°C | 7 |
| Overcharge recovery delay | TOCR | 128 | 256 | 384 | ms | V1=V2=...=V7=3.5V, V1=4.4→3.5V; Ta=+25°C | 7 |
| Overcharge reset delay | TRST | 1 | 2.5 | 4 | ms | V1=V2=...=V7=3.5V, V1=3.5→4.4→3.5V; Ta=+25°C | 7 |
| Disconnect protection delay | TOW | 10 | 20 | 30 | ms | Ta=+25°C | 7 |
| Disconnect protection release delay | TOWR | 24 | 48 | 72 | ms | Ta=+25°C | 7 |
| Supply voltage (absolute maximum, referenced to VSS) | VCC | -0.3 | | 40 | V | Referenced to VSS: printed as VSS-0.3 ~ VSS+40 V; Ta=+25°C unless noted | 6 |
| Cell input voltage (absolute maximum, each cell VC1-VC2 ... VC7-VSS) | VCELL | 0 | | 12 | V | VC1-VC2, VC2-VC3, VC3-VC4, VC4-VC5, VC5-VC6, VC6-VC7, VC7-VSS; Ta=+25°C unless noted | 6 |
| CO output terminal voltage (absolute maximum) | VCO | -0.3 | | 0.3 | V | Printed as VSS-0.3 ~ VCC+0.3 V: minimum offset is from VSS, maximum offset is from VCC; Ta=+25°C unless noted | 6 |
| Operating ambient temperature | TOPR | -40 | | 85 | °C | | 6 |
| Storage temperature range | TSTG | -55 | | 125 | °C | | 6 |
## CAD (KiCad official)
- Symbol: `CM1270-LCA-A`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `cm1270-lca-a-etched.step` / `cm1270-lca-a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cm1270-lca-a.step` / `cm1270-lca-a.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [iCM(创芯微) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603349791879409664) (15 pp, sha256 `bfdb452ec1827bd0`, retrieved 2026-11-11, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cm1270-lca-a-datasheet.pdf)