main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 14d ago
viewers cm1032-dm: viewers · Ray 14d ago
cm1032-dm-etched.glb Publish 0.1.0 · Ray 14d ago
cm1032-dm-etched.step cm1032-dm: factory component page (tier=lcsc) · Ray 14d ago
cm1032-dm-hero.glb cm1032-dm: hero GLB from the etched model (keeps the MPN mark) · Ray 14d ago
cm1032-dm-hero.overlay.json Publish 0.1.0 · Ray 14d ago
cm1032-dm.glb Publish 0.1.0 · Ray 14d ago
cm1032-dm.kicad_mod Publish 0.1.0 · Ray 14d ago
cm1032-dm.kicad_sym Publish 0.1.0 · Ray 14d ago
cm1032-dm.lbr Publish 0.1.0 · Ray 14d ago
cm1032-dm.step Publish 0.1.0 · Ray 14d ago
package.json Publish 0.1.0 · Ray 14d ago
page.json Set visibility: public · Ray 14d ago
README.md Publish 0.1.0 · Ray 14d ago

CM1032-DM

iCM(创芯微) · Battery Management · MSOP-10

CM1032-DM from iCM(创芯微), in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VC1 power_in Chip power supply and positive connection of battery cell 1; VC1 is rated VSS-0.3 V to VSS+30 V, and each cell voltage (VC1-VC2, VC2-VC3, VC3-VSS) is rated -0.3 V to 6.5 V.
2 VC2 input Negative terminal of battery cell 1 and positive terminal of battery cell 2 for voltage sensing; cell voltage across VC1-VC2 and VC2-VC3 is rated -0.3 V to 6.5 V.
3 VC3 input Negative terminal of battery cell 2 and positive terminal of battery cell 3 for voltage sensing; cell voltage across VC2-VC3 and VC3-VSS is rated -0.3 V to 6.5 V.
4 VSS power_in Chip ground and negative terminal of battery cell 3; the input voltage range for VIN, RTS and RTV is referenced to VSS (VSS-0.3 V to VSS+6.5 V).
5 RTS input Connects to the NTC thermistor (B value 3950, 100 kΩ at 25 °C) for temperature detection; input rated VSS-0.3 V to VSS+6.5 V.
6 RTV input Connects to a resistor to RTS (RT = 3 × RNTC at the charge high-temperature protection point) that sets the protection temperature; input rated VSS-0.3 V to VSS+6.5 V.
7 VIN power_in Discharge overcurrent and short-circuit detection input, where the sense voltage rises with discharge current (absolute input rating VSS-0.3 V to VSS+6.5 V).
8 DO output Discharge MOSFET control output, which inverts to turn off discharge on over-discharge, overcurrent, short-circuit or temperature protection; rated VSS-0.3 V to VCC+0.3 V.
9 CO output Charge MOSFET control output, which inverts to turn off charging on over-charge, charge overcurrent or temperature protection; rated VCC-20 V to VCC+0.3 V.
10 VM input Charger and load detection terminal; rated VCC-20 V to VCC+0.3 V.

Key specifications

Parameter Value
Manufacturer iCM(创芯微)
Package MSOP-10
Category Power Management (PMIC)
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Normal operating current IVC1 12 20 μA V1=V2=V3=3.5V, VM=0V 6
Sleep (standby) current ISTB 5 6.5 μA V1=V2=V3=2.0V, VM=4V 6
Overcharge protection voltage tolerance VOC -0.025 0.025 V V1=V2=3.5V, V3=3.5 → 4.4V 6
Overcharge release voltage tolerance VOCR -0.05 0.05 V V1=V2=3.5V, V3=4.4 → 3.5V 6
Overcharge protection delay TOC 0.5 1 1.5 s V1=V2=3.5V, V3=3.5 → 4.4V 6
Overdischarge protection voltage tolerance VOD -0.08 0.08 V V1=VC2=3.5V, V3=3.5 → 2.0V 6
Overdischarge release voltage tolerance VODR -0.1 0.1 V V1=V2=3.5V, V3=2.0 → 3.5V 6
Overdischarge protection delay TOD 0.5 1 1.5 s V1=V2=3.5V, V3=3.5 → 2.0V 6
Discharge overcurrent 1 protection voltage (percent of VEC1) VEC1 85 115 % of VEC1 V1=V2=V3=3.5V, VIN=0 → 0.12V 6
Discharge overcurrent 1 protection delay TEC1 0.5 1 1.5 s V1=V2=V3=3.5V, VIN=0 → 0.12V 6
Discharge overcurrent 2 protection voltage (percent of VEC2) VEC2 85 115 % of VEC2 V1=V2=V3=3.5V, VIN=0 → 0.3V 6
Discharge overcurrent 2 protection delay TEC2 50 100 150 ms V1=V2=V3=3.5V, VIN=0 → 0.3V 6
Short-circuit protection voltage (percent of VSHORT) VSHORT 85 115 % of VSHORT V1=V2=V3=3.5V, VIN=0 → 0.8V 6
Short-circuit protection delay TSHORT 100 300 500 μs V1=V2=V3=3.5V, VIN=0 → 0.8V 6
Discharge overcurrent release delay TECR 24 48 72 ms V1=V2=V3=3.5V, VIN=0.8 → 0V, VM=VC1 → 0V 6
Charge overcurrent protection voltage (percent of VCHA) VCHA 70 130 % of VCHA V1=V2=V3=3.5V, VIN=0 → -0.5V 6
Charge overcurrent protection delay TCHA 10 20 30 ms V1=V2=V3=3.5V, VIN=0 → -0.5V 6
Charge overcurrent release delay TCHAR 24 48 72 ms V1=V2=V3=3.5V, VIN=-0.5V → 0V 6
Open-wire protection delay TOW 10 20 30 ms 6
Open-wire release delay TOWR 24 48 72 ms 6
Charge high-temperature protection temperature tolerance TCH -5 5 °C V1=V2=V3=3.5V, RTS=100K → 10K 6
Charge high-temperature recovery temperature tolerance TCHR -5 5 °C V1=V2=V3=3.5V, RTS=10K → 100K 7
Discharge high-temperature protection temperature tolerance TDH -5 5 °C V1=V2=V3=3.5V, RTS=100K → 10K 7
Discharge high-temperature recovery temperature tolerance TDHR -5 5 °C V1=V2=V3=3.5V, RTS=10K → 100K 7
Charge high-temperature protection delay DL_TCH 0.5 1 1.5 s V1=V2=V3=3.5V, RTS=100K → 10K 7
Charge high-temperature recovery delay DL_CHR 64 128 192 ms V1=V2=V3=3.5V, RTS=10K → 100K 7
Discharge high-temperature protection delay DL_DH 0.5 1 1.5 s V1=V2=V3=3.5V, RTS=100K → 10K 7
Discharge high-temperature recovery delay DL_DHR 64 128 192 ms V1=V2=V3=3.5V, RTS=10K → 100K 7
Discharge state detection voltage Vsts 1 4 7 mV V1=V2=V3=3.5V, VIN=0 → 10mV 7
Supply voltage VC1 (referenced to VSS) VC1 -0.3 30 V VSS-0.3 ~ VSS+30 V, Ta=+25°C unless noted 5
Cell voltage (VC1-VC2, VC2-VC3, VC3-VSS) VCELL -0.3 6.5 V VC1-VC2, VC2-VC3, VC3-VSS 5
Input voltage 1 (RTS, RTV, VIN) (referenced to VSS) VIN -0.3 6.5 V RTS, RTV, VIN; VSS-0.3 ~ VSS+6.5 V 5
Input voltage 2 (VM) (referenced to VCC) VIN2 -20 0.3 V VM; VCC-20 ~ VCC+0.3 V 5
CO output terminal voltage (referenced to VCC) VCO -20 0.3 V CO; VCC-20 ~ VCC+0.3 V 5
DO output terminal voltage (referenced to VCC) VDO -0.3 0.3 V DO; VSS-0.3 ~ VCC+0.3 V 5
Operating ambient temperature TOPR -40 85 °C 5
Storage temperature range TSTG -55 125 °C 5

CAD (KiCad official)

  • Symbol: CM1032-DM
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: cm1032-dm-etched.step / cm1032-dm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cm1032-dm.step / cm1032-dm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: iCM(创芯微) datasheet (16 pp, sha256 c129431ead969b66, retrieved 2026-10-20, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF