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CLVC1G125IDCKREP

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicclvc1g125idckrepfactory-2.0.0extractor-text

Verified CLVC1G125IDCKREP

by Ray · last 10 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

10 Nov 2026RayPublished by the parts factory: tier mfr, 5 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CLVC1G125IDCKREP · SC-70-5 · 5 pins
  • ✓copper: 5 copper pads, none touching another net
  • ✓datasheet: all 5 pin names found in the 15-page datasheet
  • ✓distributor: lcsc C2676114, digikey 296-19721-2-ND, mouser 595-CLVC1G125IDCKREP
  • ✓family: SOT-353_SC-70-5
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-k9qbr47_/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.12)
  • ✓pads: 5 pins = 5 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 5 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 20 kB, viewers/symbol.html 8 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ clvc1g125idckrep.kicad_sym✓ clvc1g125idckrep.kicad_mod✓ clvc1g125idckrep.step
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CLVC1G125IDCKREP

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SC-70-5

CLVC1G125IDCKREP from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Output enable: when OE is high the output is disabled (high-impedance), and OE should be tied to VCC through a pullup resistor so the output stays high-impedance during power up or power down, with the minimum resistor value set by the driver's current-sinking capability.
2 A input Data input that accepts voltages from 0 V to 5.5 V, independent of VCC.
3 GND power_in Ground connection; the datasheet requires all unused inputs to be held at VCC or GND for proper operation.
4 Y tri_state Three-state line driver output with ±24 mA drive at 3.3 V; the Ioff circuitry disables the output to prevent damaging current backflow when the device is powered down.
5 VCC power_in Supply voltage, 1.65 V to 5.5 V operating, with 1.5 V minimum for data retention only.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SC-70-5
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range (absolute max) VCC -0.5 6.5 V 2
Input voltage range (absolute max) VI -0.5 6.5 V 2
Voltage applied to output in high-impedance or power-off state (absolute max) VO -0.5 6.5 V 2
Input clamp current IIK -50 mA VI < 0 2
Output clamp current IOK -50 mA VO < 0 2
Continuous output current IO -50 50 mA 2
Continuous current through VCC or GND -100 100 mA 2
Storage temperature range Tstg -65 150 °C 2
Supply voltage VCC (operating) VCC 1.65 5.5 V Operating 3
Supply voltage VCC (data retention only) VCC 1.5 V Data retention only 3
High-level input voltage VIH VIH 1.7 V VCC = 2.3 V to 2.7 V 3
High-level input voltage VIH VIH 2 V VCC = 3 V to 3.6 V 3
Low-level input voltage VIL VIL 0.7 V VCC = 2.3 V to 2.7 V 3
Low-level input voltage VIL VIL 0.8 V VCC = 3 V to 3.6 V 3
Input voltage VI 0 5.5 V 3
High-level output current IOH IOH -4 mA VCC = 1.65 V 3
High-level output current IOH IOH -8 mA VCC = 2.3 V 3
High-level output current IOH IOH -24 mA VCC = 3 V 3
High-level output current IOH IOH -32 mA VCC = 4.5 V 3
Low-level output current IOL IOL 4 mA VCC = 1.65 V 3
Low-level output current IOL IOL 8 mA VCC = 2.3 V 3
Low-level output current IOL IOL 24 mA VCC = 3 V 3
Low-level output current IOL IOL 32 mA VCC = 4.5 V 3
Input transition rise or fall rate Δt/Δv 20 ns/V VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 3
Input transition rise or fall rate Δt/Δv 10 ns/V VCC = 3.3 V ± 0.3 V 3
Input transition rise or fall rate Δt/Δv 5 ns/V VCC = 5 V ± 0.5 V 3
Operating free-air temperature TA -40 85 °C 3
High-level output voltage VOH VOH 1.2 V IOH = -4 mA; VCC = 1.65 V 4
High-level output voltage VOH VOH 1.9 V IOH = -8 mA; VCC = 2.3 V 4
High-level output voltage VOH VOH 2.4 V IOH = -16 mA; VCC = 3 V 4
High-level output voltage VOH VOH 2.3 V IOH = -24 mA; VCC = 3 V 4
High-level output voltage VOH VOH 3.8 V IOH = -32 mA; VCC = 4.5 V 4
Low-level output voltage VOL VOL 0.1 V IOL = 100 µA; VCC = 1.65 V to 5.5 V 4
Low-level output voltage VOL VOL 0.45 V IOL = 4 mA; VCC = 1.65 V 4
Low-level output voltage VOL VOL 0.3 V IOL = 8 mA; VCC = 2.3 V 4
Low-level output voltage VOL VOL 0.4 V IOL = 16 mA; VCC = 3 V 4
Low-level output voltage VOL VOL 0.55 V IOL = 24 mA; VCC = 3 V 4
Input leakage current (A or OE inputs) II -5 5 µA VI = 5.5 V or GND; VCC = 0 V to 5.5 V 4
Power-off leakage current Ioff -10 10 µA VI or VO = 5.5 V; VCC = 0 V 4
Off-state (high-impedance) output current IOZ 10 µA VO = 0 to 5.5 V; VCC = 3.6 V 4
Quiescent supply current ICC 10 µA VI = 5.5 V or GND, IO = 0; VCC = 1.65 V to 5.5 V 4
Additional quiescent supply current per input ΔICC 500 µA One input at VCC, 0.6 V, other inputs at VCC or GND; VCC = 3 V to 5.5 V 4
Propagation delay A to Y tpd 1.9 6.9 ns CL = 15 pF; VCC = 1.8 V ± 0.15 V; Figure 1; -40°C to 85°C 4
Propagation delay A to Y tpd 0.7 4.6 ns CL = 15 pF; VCC = 2.5 V ± 0.2 V; Figure 1; -40°C to 85°C 4
Propagation delay A to Y tpd 0.6 3.7 ns CL = 15 pF; VCC = 3.3 V ± 0.3 V; Figure 1; -40°C to 85°C 4
Propagation delay A to Y tpd 0.5 3.4 ns CL = 15 pF; VCC = 5 V ± 0.5 V; Figure 1; -40°C to 85°C 4
Propagation delay A to Y tpd 2.8 9 ns CL = 30 pF or 50 pF; VCC = 1.8 V ± 0.15 V; Figure 2; -40°C to 85°C 4
Propagation delay A to Y tpd 1.2 5.5 ns CL = 30 pF or 50 pF; VCC = 2.5 V ± 0.2 V; Figure 2; -40°C to 85°C 4
Propagation delay A to Y tpd 1 4.5 ns CL = 30 pF or 50 pF; VCC = 3.3 V ± 0.3 V; Figure 2; -40°C to 85°C 4
Propagation delay A to Y tpd 1 4 ns CL = 30 pF or 50 pF; VCC = 5 V ± 0.5 V; Figure 2; -40°C to 85°C 4
Enable time OE to Y ten 3.3 10.1 ns CL = 30 pF or 50 pF; VCC = 1.8 V ± 0.15 V; Figure 2; -40°C to 85°C 4
Enable time OE to Y ten 1.5 6.6 ns CL = 30 pF or 50 pF; VCC = 2.5 V ± 0.2 V; Figure 2; -40°C to 85°C 4
Enable time OE to Y ten 1 5.3 ns CL = 30 pF or 50 pF; VCC = 3.3 V ± 0.3 V; Figure 2; -40°C to 85°C 4
Enable time OE to Y ten 1 5 ns CL = 30 pF or 50 pF; VCC = 5 V ± 0.5 V; Figure 2; -40°C to 85°C 4
Disable time OE to Y tdis 1.3 9.2 ns CL = 30 pF or 50 pF; VCC = 1.8 V ± 0.15 V; Figure 2; -40°C to 85°C 4
Disable time OE to Y tdis 1 5 ns CL = 30 pF or 50 pF; VCC = 2.5 V ± 0.2 V; Figure 2; -40°C to 85°C 4
Disable time OE to Y tdis 1 4.2 ns CL = 30 pF or 50 pF; VCC = 5 V ± 0.5 V; Figure 2; -40°C to 85°C 4
Package thermal impedance (junction to ambient) θJA 252 °C/W Calculated per JESD 51-7 2

CAD (KiCad official)

  • Symbol: CLVC1G125IDCKREP
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: clvc1g125idckrep-etched.step / clvc1g125idckrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); clvc1g125idckrep.step / clvc1g125idckrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (15 pp, sha256 25d08cc407630d2e, retrieved 2026-11-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF