CLR6219SQA

{
  "schema_version": 1,
  "type": "component",
  "slug": "clr6219sqa",
  "title": "CLR6219SQA",
  "brief": "ChipLink Tech AC-DC Controllers & Regulators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "power supply chip",
    "clr6219sqa"
  ],
  "component": {
    "mpn": "CLR6219SQA",
    "manufacturer": "ChipLink Tech",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Power Supply Chip",
    "subcategory": "AC-DC Controllers & Regulators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590233877110288384",
    "parts": {
      "symbol": "clr6219sqa.kicad_sym",
      "footprint": "clr6219sqa.kicad_mod",
      "model_3d": "clr6219sqa-etched.glb",
      "model_3d_plain": "clr6219sqa.glb",
      "model_3d_step": "clr6219sqa-etched.step",
      "model_3d_step_plain": "clr6219sqa.step",
      "lbr": "clr6219sqa.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "GND",
        "type": "power_in",
        "description": "Ground / MOSFET source return. Tie to secondary-side ground plane together with pins 2 and 3 for low-impedance return of the internal power MOSFET."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground / MOSFET source return. Parallel with pins 1 and 3; also serves as source of the internal N-MOSFET."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground / MOSFET source return. Parallel with pins 1 and 2 for current handling and thermal dissipation."
      },
      {
        "number": "4",
        "name": "VDD",
        "type": "power_in",
        "description": "Chip supply pin. Recommended operating range 7-9 V; UVLO release ~3.85 V, UVLO fall ~3.6 V. Bypass with a 0.1 µF ceramic capacitor to GND. Typical operating current 56 µA at VDD = 6 V."
      },
      {
        "number": "5",
        "name": "SW",
        "type": "power_out",
        "description": "Drain of the internal N-channel power MOSFET (BVdss = 40 V, Rds(on) = 19 mΩ typ at VGS = 4.5 V, IDS = 20 A). Also the VSW sense node used to trigger MOS on at VSW < -300 mV and off at VSW > -5 mV. Connect to the transformer secondary winding."
      },
      {
        "number": "6",
        "name": "SW",
        "type": "power_out",
        "description": "Drain of the internal N-channel power MOSFET. Parallel with pins 5, 7, 8 for current and thermal handling."
      },
      {
        "number": "7",
        "name": "SW",
        "type": "power_out",
        "description": "Drain of the internal N-channel power MOSFET. Parallel with pins 5, 6, 8."
      },
      {
        "number": "8",
        "name": "SW",
        "type": "power_out",
        "description": "Drain of the internal N-channel power MOSFET. Parallel with pins 5, 6, 7."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590233877110288384",
        "pages": 9,
        "sha256": "3a23b308c11560be",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "clr6219sqa.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "clr6219sqa-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "c2e5bc5f0b2b44b9fd3b74531c758463fe0d8814a396b440925c40dbab88cdbb",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "ChipLink Tech",
      "Package": "SOP-8",
      "Category": "Power Supply Chip",
      "Pins": "8"
    }
  },
  "variants": [
    {
      "mpn": "CLR6219SQA",
      "kind": "packaging"
    },
    {
      "mpn": "CLR6218SQA",
      "kind": "unknown"
    },
    {
      "mpn": "CLR6220SQA",
      "kind": "unknown"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "clr6219sqa"
  ],
  "discovery_pitch": "CLR6219SQA (ChipLink Tech) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "clr6219sqa.kicad_sym",
    "clr6219sqa.kicad_mod",
    "clr6219sqa.glb",
    "clr6219sqa.step",
    "clr6219sqa.lbr",
    "docs/hero.png",
    "docs/clr6219sqa-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T19:14:19.173Z"
}