# CLH1005T-1N3S-S

**Chilisin Elec** · Inductors (SMD) · 0402

CLH1005T-1N3S-S from Chilisin Elec, in a 0402. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Terminal electrode at one end of the CLH1005T-1N3S-S 1.3 nH chip inductor; rated 400 mA max (IDC), RDC 0.10 ohm max, SRF 9000 MHz typ. |
| 2 | 2 | passive | Terminal electrode at the opposite end of the CLH1005T-1N3S-S 1.3 nH chip inductor; the part is a two-terminal inductor, and the datasheet gives no polarity requirement. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Chilisin Elec |
| Package | 0402 |
| Category | Inductors, Coils, Chokes |
| Pins | 2 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Q factor (minimum) | Q | 8 |  |  |  | Test frequency 100 MHz | 6 |
| DC resistance (maximum) | RDC |  |  | 0.1 | Ω |  | 6 |
| Rated current IDC (maximum) | IDC |  |  | 400 | mA | Current applied to coils; inductance shall be less than 10% initial value (table note) | 6 |
| Inductance drop at IDC (maximum) |  |  |  | 10 | % | IDC applied to coils (table note wording: inductance shall be less than 10% initial value) | 6 |
| Inductance tolerance (S code, ±0.3 nH) | L | -0.3 |  | 0.3 | nH | Tolerance code S = ±0.3nH | 6 |
| Inductance (nominal) | L |  | 1.3 |  | nH | Test frequency 100 MHz | 6 |
| Self-resonant frequency (typical) | SRF |  | 9000 |  | MHz |  | 6 |
| Operating temperature range |  | -55 |  | 125 | ℃ | Including self-temperature rise | 6 |

## CAD (KiCad official)

- Symbol: `CLH1005T-1N3S-S`
- Footprint: `Inductor_SMD:L_0402_1005Metric`
- 3D model: 0402 (KiCad packages3D, STEP)
- 3D model files: `clh1005t-1n3s-s-etched.step` / `clh1005t-1n3s-s-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `clh1005t-1n3s-s.step` / `clh1005t-1n3s-s.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Chilisin Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588932378261925888) (18 pp, sha256 `4eeb32dfa0ffad33`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/clh1005t-1n3s-s-datasheet.pdf)