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CL9936A50L3M

Public Made by Adom

by adom

CHIPLINK(芯联) Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-3L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CL9936A50L3M

CHIPLINK(芯联) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3L

CL9936A50L3M from CHIPLINK(芯联), in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground terminal (接地端) for the regulator.
2 VOUT power_out Regulated output; the datasheet limits output current to 300 mA maximum for the 5.0 V option and gives an absolute maximum VOUT pin voltage of GND-0.3 V to 7 V.
3 VIN power_in Supply input with an 18 V maximum operating input voltage (absolute maximum -0.3 V to +20 V); ceramic input capacitors above VIN = 12 V can produce hot-plug spikes that exceed 18 V and may damage the chip.

Key specifications

Parameter Value
Manufacturer CHIPLINK(芯联)
Package SOT-23-3L
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN pin voltage VIN -0.3 20 V 3
VOUT pin current IOUT 500 mA Note (1): IOUT Pd/(VIN-VOUT) 3
VOUT pin voltage VOUT 7 V Minimum printed as GND-0.3 V 3
Maximum power dissipation, SOT23_3L Pd 300 mW SOT23_3L package 3
Maximum power dissipation, SOT23_3L with added PCB heat dissipation Pd 600 mW SOT23_3L package; with added PCB heat dissipation; note (2): reference only 3
Operating ambient temperature Topr -25 85 C 3
Storage temperature Tstg -40 125 C 3
Soldering temperature Tsolder 260 C 10 s 3

CAD (KiCad official)

  • Symbol: CL9936A50L3M
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3L (KiCad packages3D, STEP)
  • 3D model files: cl9936a50l3m-etched.step / cl9936a50l3m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cl9936a50l3m.step / cl9936a50l3m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: CHIPLINK(芯联) datasheet (12 pp, sha256 d933829e18d26bad, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF