component
CL9901A30S3M
Public Made by Adomby adom
CHIPLINK(芯联) Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
CL9901A30S3M
CHIPLINK(芯联) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23
CL9901A30S3M from CHIPLINK(芯联), in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin (接地端) for the SOT-23 package; the datasheet gives no electrical limit for this pin. |
| 2 | VOUT | power_out | Regulated output; the VOUT pin voltage is limited to GND-0.3 V to VIN+0.3 V and the output current is limited to 500 mA (Note 1: IOUT = Pd/(VIN-VOUT)). |
| 3 | VIN | power_in | Supply input; the VIN pin voltage is rated -0.3 V to +6.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CHIPLINK(芯联) |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 输入电压 (VIN pin, absolute maximum) | VIN | -0.3 | 6 | V | 3 | ||
| 输入电压 (electrical table, CL9901A30) | VIN | 6 | V | 5 | |||
| 输出电压 (A30, multiplier of VOUT(T)) | VOUT | 0.98 | 1.02 | V | VIN =VOUT+1V, IOUT=40mA | 5 | |
| VOUT脚电流 (IOUT pin current, absolute maximum) | IOUT | 500 | mA | Note (1): IOUT = Pd/(VIN-VOUT) | 3 | ||
| 最大功耗 SOT23 | 150 | mW | SOT23 package | 3 | |||
| 最大功耗 SOT23 (增加PCB散热) | 300 | mW | with added PCB heat dissipation; note (2), reference only | 3 | |||
| 工作环境温度 | Topr | -25 | 85 | C | 3 | ||
| 存贮温度 | Tstg | -40 | 125 | C | 3 | ||
| 焊接温度和时间 | Tsolder | 260 | C | 10 s | 3 | ||
| 人体模型ESD级别 | 4000 | V | Human body model | 3 | |||
| 机器模型ESD级别 | 400 | V | Machine model | 3 | |||
| Latch-up 级别 | 400 | mA | 3 | ||||
| 输入/输出电容 CIN (test range) | CIN | 1 | 10 | uF | CIN=1uF~10uF | 5 | |
| 输出电容 COUT (test range) | COUT | 1 | 10 | uF | COUT=1uF~10uF | 5 | |
| 静态电流 | IQ | 8 | uA | 5 | |||
| 最大输出电流 | IOUT (max) | 250 | mA | VIN =2.4V | 5 | ||
| 负载特性 | ΔVOUT | 30 | mV | VIN=VOUT+1V, 1mA≤IOUT≤100mA | 5 | ||
| 压差 Vdif1 | Vdif1 | 200 | mV | IOUT =80mA | 5 | ||
| 压差 Vdif2 | Vdif2 | 400 | mV | IOUT =200mA | 5 | ||
| 电源电压调整率 | ΔVOUT/ΔVIN*VOUT | 0.05 | %/V | IOUT =40mA, VOUT+1V≤VIN≤9V | 5 | ||
| 短路电流 | ISHORT | 10 | mA | 5 | |||
| 过流保护电流 | ILIMIT | 500 | mA | 5 | |||
| 纹波抑制比 | PSRR | 50 | dB | IOUT =10mA, f=1kHz | 5 |
CAD (KiCad official)
- Symbol:
CL9901A30S3M - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
cl9901a30s3m-etched.step/cl9901a30s3m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cl9901a30s3m.step/cl9901a30s3m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: CHIPLINK(芯联) datasheet (10 pp, sha256
80814e3270d530b4, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CL9901A30S3M
**CHIPLINK(芯联)** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23
CL9901A30S3M from CHIPLINK(芯联), in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin (接地端) for the SOT-23 package; the datasheet gives no electrical limit for this pin. |
| 2 | VOUT | power_out | Regulated output; the VOUT pin voltage is limited to GND-0.3 V to VIN+0.3 V and the output current is limited to 500 mA (Note 1: IOUT = Pd/(VIN-VOUT)). |
| 3 | VIN | power_in | Supply input; the VIN pin voltage is rated -0.3 V to +6.0 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CHIPLINK(芯联) |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 输入电压 (VIN pin, absolute maximum) | VIN | -0.3 | | 6 | V | | 3 |
| 输入电压 (electrical table, CL9901A30) | VIN | | | 6 | V | | 5 |
| 输出电压 (A30, multiplier of VOUT(T)) | VOUT | 0.98 | | 1.02 | V | VIN =VOUT+1V, IOUT=40mA | 5 |
| VOUT脚电流 (IOUT pin current, absolute maximum) | IOUT | | | 500 | mA | Note (1): IOUT = Pd/(VIN-VOUT) | 3 |
| 最大功耗 SOT23 | | | | 150 | mW | SOT23 package | 3 |
| 最大功耗 SOT23 (增加PCB散热) | | | | 300 | mW | with added PCB heat dissipation; note (2), reference only | 3 |
| 工作环境温度 | Topr | -25 | | 85 | C | | 3 |
| 存贮温度 | Tstg | -40 | | 125 | C | | 3 |
| 焊接温度和时间 | Tsolder | | | 260 | C | 10 s | 3 |
| 人体模型ESD级别 | | | | 4000 | V | Human body model | 3 |
| 机器模型ESD级别 | | | | 400 | V | Machine model | 3 |
| Latch-up 级别 | | | | 400 | mA | | 3 |
| 输入/输出电容 CIN (test range) | CIN | 1 | | 10 | uF | CIN=1uF~10uF | 5 |
| 输出电容 COUT (test range) | COUT | 1 | | 10 | uF | COUT=1uF~10uF | 5 |
| 静态电流 | IQ | | 8 | | uA | | 5 |
| 最大输出电流 | IOUT (max) | | 250 | | mA | VIN =2.4V | 5 |
| 负载特性 | ΔVOUT | | 30 | | mV | VIN=VOUT+1V, 1mA≤IOUT≤100mA | 5 |
| 压差 Vdif1 | Vdif1 | | 200 | | mV | IOUT =80mA | 5 |
| 压差 Vdif2 | Vdif2 | | 400 | | mV | IOUT =200mA | 5 |
| 电源电压调整率 | ΔVOUT/ΔVIN*VOUT | | 0.05 | | %/V | IOUT =40mA, VOUT+1V≤VIN≤9V | 5 |
| 短路电流 | ISHORT | | 10 | | mA | | 5 |
| 过流保护电流 | ILIMIT | | 500 | | mA | | 5 |
| 纹波抑制比 | PSRR | | 50 | | dB | IOUT =10mA, f=1kHz | 5 |
## CAD (KiCad official)
- Symbol: `CL9901A30S3M`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `cl9901a30s3m-etched.step` / `cl9901a30s3m-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cl9901a30s3m.step` / `cl9901a30s3m.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [CHIPLINK(芯联) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603127895221157888) (10 pp, sha256 `80814e3270d530b4`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cl9901a30s3m-datasheet.pdf)