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CL9193A18L3M

CHIPLINK(芯联) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3L

CL9193A18L3M from CHIPLINK(芯联), in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin for the regulator.
2 VOUT power_out Regulated output; the datasheet specifies output voltages from 1.2V to 3.6V and output current up to 300mA.
3 VIN power_in Power supply input; the electrical characteristics specify VIN up to 5.5V, and the absolute maximum input voltage is 7V.

Key specifications

Parameter Value
Manufacturer CHIPLINK(芯联)
Package SOT-23-3L
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage (effective, relative to VOUT(T)) VOUT(E) 0.98 1.02 V IOUT=40mA, VIN=Vout+1V 5
Input Voltage VIN 5.5 V 5
EN starting voltage VCE_ON 1.1 V 5
EN off voltage VCE_OFF 0.4 V 5
Load Regulation ΔVOUT 50 mV VIN=Vout+1V, 1mA≤IOUT≤100mA 5
Dropout Voltage Vdif1 90 mV IOUT =100mA 5
Dropout Voltage Vdif2 230 mV IOUT =200mA 5
Shunt-down Current ICEL 1 μA Vce=0V 5
Line Regulation ΔVOUT/(ΔVIN•VOUT) 0.05 %/V IOUT =40mA, Vout+1V ≤VIN≤8V 5
Output Noise Voltage en 50 uVrms IOUT =40mA, 300Hz~50kHz 5
Input Voltage (absolute maximum) VIN 7 V 3
Output Current (absolute maximum) Iout 450 mA 3
Operating Temperature TOpr -40 85 ℃ 3
Storage Temperature Tstg -55 125 ℃ 3
Lead Temperature (soldering) Tsolder 260 ℃ 10 s 3
Power Dissipation Pd 250 mW SOT-23-3L package 3
Output Current (maximum) IOUT(max) 300 mA VIN=Vout+1V 5
Stand-by Current ISS 70 μA VIN=Vout+1V 5
Power Supply Rejection Ratio PSRR 70 dB Vin=[Vout+1]V +1Vp-pAC, IOUT =40mA, f=1kHz 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing ppa body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus 9

CAD (KiCad official)

  • Symbol: CL9193A18L3M
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3L (KiCad packages3D, STEP)
  • 3D model files: cl9193a18l3m-etched.step / cl9193a18l3m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cl9193a18l3m.step / cl9193a18l3m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: CHIPLINK(芯联) datasheet (9 pp, sha256 44a489707df24fae, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF