component
CL4056D
Public Made by Adomby adom
ChipLink Tech Battery Management ICs, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CL4056D
ChipLink Tech · Battery Management ICs · ESOP-8
CL4056D from ChipLink Tech, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TEMP | input | Battery temperature detection input; charging is suspended if the TEMP voltage is below 45% or above 80% of the input voltage, and connecting TEMP directly to GND disables the temperature detection. |
| 2 | PROG | passive | Charge current setting and monitor pin, where RPROG to GND sets the constant charge current (1.2 kΩ gives 1000 mA, 2.4 kΩ gives 500 mA) and PROG pin voltage is 1.0 V in CC mode. |
| 3 | GND | power_in | Ground reference for the charger, including the RPROG resistor connection. |
| 4 | VCC | power_in | Supply voltage input with a 4.2 V to 6.5 V operating range and a 3.8 V rising UVLO threshold; absolute maximum is -0.3 V to 6.5 V. |
| 5 | BAT | power_out | Battery connection and charge output, regulating the battery to a 4.2 V float voltage within 1% accuracy with a BAT pin current limit of 1 A (absolute maximum 1 A). |
| 6 | STDBY | output | Open-drain charge-complete status output that is pulled low when the battery is fully charged, with an absolute maximum pin voltage of -0.3 V to 8 V. |
| 7 | CHRG | output | Open-drain charge status output that is pulled low while the charger is charging, with an absolute maximum pin voltage of -0.3 V to 8 V. |
| 8 | CE | input | Chip enable input where a high level (above 1.3 V) starts charging and a low level (below 0.7 V) stops charging. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ChipLink Tech |
| Package | ESOP-8 |
| Category | Power Supply Chip |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 4.2 | 6.5 | V | 6 | ||
| Supply Current, charge mode | ICC | 240 | 500 | uA | Charge mode, RPROG=12K | 6 | |
| Supply Current, stand-by mode | ICC | 50 | 100 | uA | Stand-by mode (Charge Termination) | 6 | |
| Supply Current, shunt-down mode | ICC | 35 | 70 | uA | Shunt-down mode (Vcc< VBAT, Vcc< VUVLO, RPROG not connect) | 6 | |
| CV Output (Float) Voltage | VFLOAT | 4.158 | 4.2 | 4.284 | V | 0C≤T≤85C | 6 |
| BAT Pin Current, CC mode | IBAT | 465 | 500 | 535 | mA | CC MODE, RPROG=2.4K | 6 |
| BAT Pin Current, CC mode | IBAT | 930 | 1000 | 1070 | mA | CC MODE, RPROG=1.2K | 6 |
| BAT Pin Current, stand-by mode | IBAT | 0 | -2.5 | -6 | uA | Stand-by mode, VBAT=4.2V | 6 |
| BAT Pin Current, shunt-down mode | IBAT | 1 | 2 | uA | Shunt-down mode | 6 | |
| BAT Reverse Leakage Current | IBAT | 0.7 | mA | BAT Reverse, VBAT=-4V | 6 | ||
| BAT Pin Current, sleep mode | 0 | 1 | uA | Sleep mode, VCC=0V | 6 | ||
| Trickle Charge Current | ITRIKL | 40 | 50 | 60 | mA | VBAT<VTRIKL, RPROG=2.4K | 6 |
| Trickle Charge Current | ITRIKL | 80 | 100 | 120 | mA | VBAT<VTRIKL, RPROG=1.2K | 6 |
| Trickle Charge Threshold Voltage | VTRIKL | 2.8 | 2.9 | 3 | V | VBAT Rising | 6 |
| Trickle Charge Hysteresis Voltage | VTRHYS | 60 | 80 | 100 | mV | VBAT Falling | 6 |
| VCC Under Voltage Lockout Threshold | VUVLO | 3.7 | 3.8 | 3.93 | V | VCC Rising | 6 |
| VCC Under Voltage Lockout Threshold Hysteresis | VUVHYS | 150 | 200 | 300 | mV | VCC Falling | 6 |
| Manual Shutdown Threshold Voltage | VMSD | 1.15 | 1.21 | 1.3 | V | PROG Rising | 6 |
| Manual Shutdown Threshold Voltage | VMSD | 0.9 | 1 | 1.1 | V | PROG Falling | 6 |
| VCC-VBAT Lockout Threshold | VASD | 70 | 100 | 140 | mV | VCC Rising | 6 |
| VCC-VBAT Lockout Threshold | VASD | 5 | 30 | 50 | mV | VCC Falling | 6 |
| C/10 Termination Comparator Current Ratio | ITERM | 0.085 | 0.1 | 0.115 | mA/mA | RPROG=1.2K | 6 |
| PROG Pin Voltage | VPROG | 0.93 | 1 | 1.07 | V | CC MODE, RPROG=1.2K | 6 |
| CHRG Pin Output Low Voltage | VCHRG | 0.35 | 0.6 | V | ICHRG=5mA | 6 | |
| STDBY Pin Output Low Voltage | VSTDBY | 0.35 | 0.6 | V | ISTDBY=5mA | 6 | |
| TEMP Pin High Threshold Voltage | VTEMP_H | 80 | 83 | %VCC | 6 | ||
| TEMP Pin Low Threshold Voltage | VTEMP_L | 42 | 45 | %VCC | 6 | ||
| Battery Recharge Threshold Voltage | VRECHG | 100 | 200 | mV | VFLOAT-VRECHG | 7 | |
| Recharge Comparator Filter Time | TRECHG | 0.8 | 1.8 | 4 | ms | VBAT High to Low | 7 |
| C/10 Termination Comparator Filter Time | TTERM | 0.63 | 1.4 | 3 | ms | IBAT Falling below ITERM | 7 |
| PROG Pin Pull-up Current | IPROG | 2 | uA | 7 | |||
| CE High Input Voltage | VCE_H | 1.3 | V | CE High | 7 | ||
| CE Low Input Voltage | VCE_L | 0.7 | V | CE low | 7 | ||
| Supply Voltage (absolute maximum) | -0.3 | 6.5 | V | 4 | |||
| PROG, BAT, CE, TEMP Voltage | -0.3 | 6.5 | V | 4 | |||
| CHRG Pin Voltage | -0.3 | 8 | V | 4 | |||
| STDBY Pin Voltage | -0.3 | 8 | V | 4 | |||
| BAT Pin Current | 1 | A | 4 | ||||
| PROG Pin Current | 2 | mA | 4 | ||||
| Allowable Power Dissipation | 1500 | mW | 4 | ||||
| Operating Temperature | -40 | 85 | C | 4 | |||
| Storage Temperature | -65 | 125 | C | 4 | |||
| ESD HBM | 4000 | V | 4 | ||||
| ESD MM | 400 | V | 4 | ||||
| Latch-up | 400 | mA | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | ppa | body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus | 14 |
CAD (KiCad official)
- Symbol:
CL4056D - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
cl4056d-etched.step/cl4056d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cl4056d.step/cl4056d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ChipLink Tech datasheet (14 pp, sha256
85282efc15dfcfe3, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CL4056D
**ChipLink Tech** · Battery Management ICs · ESOP-8
CL4056D from ChipLink Tech, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TEMP | input | Battery temperature detection input; charging is suspended if the TEMP voltage is below 45% or above 80% of the input voltage, and connecting TEMP directly to GND disables the temperature detection. |
| 2 | PROG | passive | Charge current setting and monitor pin, where RPROG to GND sets the constant charge current (1.2 kΩ gives 1000 mA, 2.4 kΩ gives 500 mA) and PROG pin voltage is 1.0 V in CC mode. |
| 3 | GND | power_in | Ground reference for the charger, including the RPROG resistor connection. |
| 4 | VCC | power_in | Supply voltage input with a 4.2 V to 6.5 V operating range and a 3.8 V rising UVLO threshold; absolute maximum is -0.3 V to 6.5 V. |
| 5 | BAT | power_out | Battery connection and charge output, regulating the battery to a 4.2 V float voltage within 1% accuracy with a BAT pin current limit of 1 A (absolute maximum 1 A). |
| 6 | STDBY | output | Open-drain charge-complete status output that is pulled low when the battery is fully charged, with an absolute maximum pin voltage of -0.3 V to 8 V. |
| 7 | CHRG | output | Open-drain charge status output that is pulled low while the charger is charging, with an absolute maximum pin voltage of -0.3 V to 8 V. |
| 8 | CE | input | Chip enable input where a high level (above 1.3 V) starts charging and a low level (below 0.7 V) stops charging. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ChipLink Tech |
| Package | ESOP-8 |
| Category | Power Supply Chip |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 4.2 | | 6.5 | V | | 6 |
| Supply Current, charge mode | ICC | | 240 | 500 | uA | Charge mode, RPROG=12K | 6 |
| Supply Current, stand-by mode | ICC | | 50 | 100 | uA | Stand-by mode (Charge Termination) | 6 |
| Supply Current, shunt-down mode | ICC | | 35 | 70 | uA | Shunt-down mode (Vcc< VBAT, Vcc< VUVLO, RPROG not connect) | 6 |
| CV Output (Float) Voltage | VFLOAT | 4.158 | 4.2 | 4.284 | V | 0C≤T≤85C | 6 |
| BAT Pin Current, CC mode | IBAT | 465 | 500 | 535 | mA | CC MODE, RPROG=2.4K | 6 |
| BAT Pin Current, CC mode | IBAT | 930 | 1000 | 1070 | mA | CC MODE, RPROG=1.2K | 6 |
| BAT Pin Current, stand-by mode | IBAT | 0 | -2.5 | -6 | uA | Stand-by mode, VBAT=4.2V | 6 |
| BAT Pin Current, shunt-down mode | IBAT | | 1 | 2 | uA | Shunt-down mode | 6 |
| BAT Reverse Leakage Current | IBAT | | 0.7 | | mA | BAT Reverse, VBAT=-4V | 6 |
| BAT Pin Current, sleep mode | | | 0 | 1 | uA | Sleep mode, VCC=0V | 6 |
| Trickle Charge Current | ITRIKL | 40 | 50 | 60 | mA | VBAT<VTRIKL, RPROG=2.4K | 6 |
| Trickle Charge Current | ITRIKL | 80 | 100 | 120 | mA | VBAT<VTRIKL, RPROG=1.2K | 6 |
| Trickle Charge Threshold Voltage | VTRIKL | 2.8 | 2.9 | 3 | V | VBAT Rising | 6 |
| Trickle Charge Hysteresis Voltage | VTRHYS | 60 | 80 | 100 | mV | VBAT Falling | 6 |
| VCC Under Voltage Lockout Threshold | VUVLO | 3.7 | 3.8 | 3.93 | V | VCC Rising | 6 |
| VCC Under Voltage Lockout Threshold Hysteresis | VUVHYS | 150 | 200 | 300 | mV | VCC Falling | 6 |
| Manual Shutdown Threshold Voltage | VMSD | 1.15 | 1.21 | 1.3 | V | PROG Rising | 6 |
| Manual Shutdown Threshold Voltage | VMSD | 0.9 | 1 | 1.1 | V | PROG Falling | 6 |
| VCC-VBAT Lockout Threshold | VASD | 70 | 100 | 140 | mV | VCC Rising | 6 |
| VCC-VBAT Lockout Threshold | VASD | 5 | 30 | 50 | mV | VCC Falling | 6 |
| C/10 Termination Comparator Current Ratio | ITERM | 0.085 | 0.1 | 0.115 | mA/mA | RPROG=1.2K | 6 |
| PROG Pin Voltage | VPROG | 0.93 | 1 | 1.07 | V | CC MODE, RPROG=1.2K | 6 |
| CHRG Pin Output Low Voltage | VCHRG | | 0.35 | 0.6 | V | ICHRG=5mA | 6 |
| STDBY Pin Output Low Voltage | VSTDBY | | 0.35 | 0.6 | V | ISTDBY=5mA | 6 |
| TEMP Pin High Threshold Voltage | VTEMP_H | | 80 | 83 | %VCC | | 6 |
| TEMP Pin Low Threshold Voltage | VTEMP_L | | 42 | 45 | %VCC | | 6 |
| Battery Recharge Threshold Voltage | VRECHG | | 100 | 200 | mV | VFLOAT-VRECHG | 7 |
| Recharge Comparator Filter Time | TRECHG | 0.8 | 1.8 | 4 | ms | VBAT High to Low | 7 |
| C/10 Termination Comparator Filter Time | TTERM | 0.63 | 1.4 | 3 | ms | IBAT Falling below ITERM | 7 |
| PROG Pin Pull-up Current | IPROG | | 2 | | uA | | 7 |
| CE High Input Voltage | VCE_H | | 1.3 | | V | CE High | 7 |
| CE Low Input Voltage | VCE_L | | 0.7 | | V | CE low | 7 |
| Supply Voltage (absolute maximum) | | -0.3 | | 6.5 | V | | 4 |
| PROG, BAT, CE, TEMP Voltage | | -0.3 | | 6.5 | V | | 4 |
| CHRG Pin Voltage | | -0.3 | | 8 | V | | 4 |
| STDBY Pin Voltage | | -0.3 | | 8 | V | | 4 |
| BAT Pin Current | | | | 1 | A | | 4 |
| PROG Pin Current | | | | 2 | mA | | 4 |
| Allowable Power Dissipation | | | | 1500 | mW | | 4 |
| Operating Temperature | | -40 | | 85 | C | | 4 |
| Storage Temperature | | -65 | | 125 | C | | 4 |
| ESD HBM | | | | 4000 | V | | 4 |
| ESD MM | | | | 400 | V | | 4 |
| Latch-up | | | | 400 | mA | | 4 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | ppa | | body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus | 14 |
## CAD (KiCad official)
- Symbol: `CL4056D`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`
- 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files: `cl4056d-etched.step` / `cl4056d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cl4056d.step` / `cl4056d.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ChipLink Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589834698379210752) (14 pp, sha256 `85282efc15dfcfe3`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cl4056d-datasheet.pdf)