CKS32F103RCT6 from CKS, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup power supply, 1.8-3.6 V, that feeds the RTC, the external 32 kHz oscillator and the backup registers when VDD is off.
2	PC13	bidirectional	General-purpose I/O PC13 (TAMPER-RTC); it is powered through a power switch that sinks only 3 mA, so as an output it is limited to 2 MHz mode, 30 pF maximum load, and no current-source use such as driving an LED.
3	PC14	bidirectional	General-purpose I/O PC14 (OSC32_IN); it shares the same power-switch limits as PC13 (3 mA, 2 MHz, 30 pF, no current source) when used as an output.
4	PC15	bidirectional	General-purpose I/O PC15 (OSC32_OUT); it shares the same power-switch limits as PC13 (3 mA, 2 MHz, 30 pF, no current source) when used as an output.
5	OSC_IN	input	External 4-16 MHz crystal/resonator oscillator input; on LQFP48/64 this pin defaults to OSC_IN after reset and can be reconfigured in software as PD0.
6	OSC_OUT	output	External 4-16 MHz crystal/resonator oscillator output; on LQFP48/64 this pin defaults to OSC_OUT after reset and can be reconfigured in software as PD1.
7	NRST	bidirectional	Active-low reset pin with an internal pull-up (RPU about 30-50 kΩ); the input low level must stay at or below 0.8 V for the MCU to reset.
8	PC0	bidirectional	General-purpose I/O PC0 with ADC123_IN10 analog input.
9	PC1	bidirectional	General-purpose I/O PC1 with ADC123_IN11 analog input.
10	PC2	bidirectional	General-purpose I/O PC2 with ADC123_IN12 analog input.
11	PC3	bidirectional	General-purpose I/O PC3 with ADC123_IN13 analog input.
12	VSSA	power_in	Analog ground for ADC, DAC, reset block, RC oscillators and PLL; must be connected to VSS.
13	VDDA	power_in	Analog supply, 2.0-3.6 V without ADC/DAC and at least 2.4 V when ADC or DAC is used; must be connected to VDD.
14	PA0-WKUP	bidirectional	General-purpose I/O PA0 with WKUP wake-up input, USART2_CTS, ADC123_IN0, TIM2_CH1_ETR, TIM5_CH1 and TIM8_ETR functions.
15	PA1	bidirectional	General-purpose I/O PA1 with USART2_RTS, ADC123_IN1, TIM5_CH2 and TIM2_CH2 functions.
16	PA2	bidirectional	General-purpose I/O PA2 with USART2_TX, TIM9_CH1, TIM5_CH3, ADC123_IN2 and TIM2_CH3 functions.
17	PA3	bidirectional	General-purpose I/O PA3 with USART2_RX, TIM9_CH2, TIM5_CH4, ADC123_IN3 and TIM2_CH4 functions.
18	VSS_4	power_in	Digital ground.
19	VDD_4	power_in	Digital power supply for I/O pins and internal regulator, 2.0-3.6 V.
20	PA4	bidirectional	General-purpose I/O PA4 with SPI1_NSS, USART2_CK, DAC_OUT1 and ADC12_IN4 functions.
21	PA5	bidirectional	General-purpose I/O PA5 with SPI1_SCK, DAC_OUT2 and ADC12_IN5 functions.
22	PA6	bidirectional	General-purpose I/O PA6 with SPI1_MISO, TIM8_BKIN, ADC12_IN6, TIM13_CH1, TIM1_BKIN and TIM3_CH1 functions.
23	PA7	bidirectional	General-purpose I/O PA7 with SPI1_MOSI, TIM8_CH1N, ADC12_IN7, TIM14_CH1, TIM1_CHIN and TIM3_CH2 functions.
24	PC4	bidirectional	General-purpose I/O PC4 with ADC12_IN14 analog input.
25	PC5	bidirectional	General-purpose I/O PC5 with ADC12_IN15 analog input.
26	PB0	bidirectional	General-purpose I/O PB0 with ADC12_IN8, TIM3_CH3, TIM8_CH2N and TIM1_CH2N functions.
27	PB1	bidirectional	General-purpose I/O PB1 with ADC12_IN9, TIM3_CH4, TIM8_CH3N and TIM1_CH3N functions.
28	PB2	bidirectional	5 V tolerant (FT) general-purpose I/O PB2, also used as the BOOT1 boot-mode selection pin.
29	PB10	bidirectional	5 V tolerant (FT) general-purpose I/O PB10 with I2C2_SCL, USART3_TX and TIM2_CH3 functions.
30	PB11	bidirectional	5 V tolerant (FT) general-purpose I/O PB11 with I2C2_SDA, USART3_RX and TIM2_CH4 functions.
31	VSS_1	power_in	Digital ground.
32	VDD_1	power_in	Digital power supply for I/O pins and internal regulator, 2.0-3.6 V.
33	PB12	bidirectional	5 V tolerant (FT) general-purpose I/O PB12 with SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK and TIM1_BKIN functions.
34	PB13	bidirectional	5 V tolerant (FT) general-purpose I/O PB13 with SPI2_SCK, I2S2_CK, USART3_CTS and TIM1_CH1N functions.
35	PB14	bidirectional	5 V tolerant (FT) general-purpose I/O PB14 with SPI2_MISO, USART3_RTS, TIM12_CH1 and TIM1_CH2N functions.
36	PB15	bidirectional	5 V tolerant (FT) general-purpose I/O PB15 with SPI2_MOSI, I2S2_SD, TIM12_CH2 and TIM1_CH3N functions.
37	PC6	bidirectional	5 V tolerant (FT) general-purpose I/O PC6 with I2S2_MCK, TIM3_CH1, TIM8_CH1, USART6_TX and SDIO_D6 functions.
38	PC7	bidirectional	5 V tolerant (FT) general-purpose I/O PC7 with I2S3_MCK, TIM8_CH2, USART6_RX, SDIO_D7 and TIM3_CH2 functions.
39	PC8	bidirectional	5 V tolerant (FT) general-purpose I/O PC8 with TIM8_CH3, USART6_CK, SDIO_D0 and TIM3_CH3 functions.
40	PC9	bidirectional	5 V tolerant (FT) general-purpose I/O PC9 with TIM8_CH4, SDIO_D1 and TIM3_CH4 functions.
41	PA8	bidirectional	5 V tolerant (FT) general-purpose I/O PA8 with USART1_CK, TIM1_CH1 and MCO functions.
42	PA9	bidirectional	5 V tolerant (FT) general-purpose I/O PA9 with USART1_TX and TIM1_CH2 functions.
43	PA10	bidirectional	5 V tolerant (FT) general-purpose I/O PA10 with USART1_RX and TIM1_CH3 functions.
44	PA11	bidirectional	5 V tolerant (FT) general-purpose I/O PA11 with USART1_CTS, CAN_RX, USBDM and TIM1_CH4 functions.
45	PA12	bidirectional	5 V tolerant (FT) general-purpose I/O PA12 with USART1_RTS, USBDP, CAN_TX and TIM1_ETR functions.
46	PA13	bidirectional	5 V tolerant (FT) general-purpose I/O PA13, which is the JTMS/SWDIO debug pin in its default function after reset.
47	VSS_2	power_in	Digital ground.
48	VDD_2	power_in	Digital power supply for I/O pins and internal regulator, 2.0-3.6 V.
49	PA14	bidirectional	5 V tolerant (FT) general-purpose I/O PA14, which is the JTCK/SWCLK debug pin in its default function after reset.
50	PA15	bidirectional	5 V tolerant (FT) general-purpose I/O PA15, which is the JTDI debug pin in its default function and can be remapped to SPI1_NSS, SPI3_NSS/I2S3_WS or TIM2_CH1_ETR.
51	PC10	bidirectional	5 V tolerant (FT) general-purpose I/O PC10 with USART4_TX, SDIO_D2 and USART3_TX functions.
52	PC11	bidirectional	5 V tolerant (FT) general-purpose I/O PC11 with USART4_RX, SDIO_D3 and USART3_RX functions.
53	PC12	bidirectional	5 V tolerant (FT) general-purpose I/O PC12 with USART5_TX, SDIO_CK and USART3_CK functions.
54	PD2	bidirectional	5 V tolerant (FT) general-purpose I/O PD2 with TIM3_ETR, USART5_RX and SDIO_CMD functions.
55	PB3	bidirectional	5 V tolerant (FT) general-purpose I/O PB3, which is the JTDO/TRACESWO debug pin in its default function and can also serve SPI3_SCK/I2S3_CK, TIM2_CH2 and SPI1_SCK.
56	PB4	bidirectional	5 V tolerant (FT) general-purpose I/O PB4, which is the NJTRST debug pin in its default function and can also serve SPI3_MISO, TIM3_CH1 and SPI1_MISO.
57	PB5	bidirectional	General-purpose I/O PB5 with I2C1_SMBA, SPI3_MOSI/I2S3_SD, TIM3_CH2 and SPI1_MOSI functions.
58	PB6	bidirectional	5 V tolerant (FT) general-purpose I/O PB6 with I2C1_SCL, USART1_TX and TIM4_CH1 functions.
59	PB7	bidirectional	5 V tolerant (FT) general-purpose I/O PB7 with I2C1_SDA, FSMC_NADV, TIM4_CH2 and USART1_RX functions.
60	BOOT0	input	Boot mode selection input sampled at startup together with BOOT1 to choose the boot source (main Flash, system memory or internal SRAM).
61	PB8	bidirectional	5 V tolerant (FT) general-purpose I/O PB8 with TIM4_CH3, TIM10_CH1, SDIO_D4, I2C1_SCL and CAN_RX functions.
62	PB9	bidirectional	5 V tolerant (FT) general-purpose I/O PB9 with TIM4_CH4, TIM11_CH1, SDIO_D5, I2C1_SDA and CAN_TX functions.
63	VSS_3	power_in	Digital ground.
64	VDD_3	power_in	Digital power supply for I/O pins and internal regulator, 2.0-3.6 V.

Key specifications

Parameter	Value
Manufacturer	CKS
Package	LQFP-64(10x10)
Category	Single Chip Microcomputer/Microcontroller
Pins	64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
SD/MMC clock frequency in data transfer mode	fPP	0			MHz	CL ≤ 30pF	82
USB transceiver startup time	tSTARTUP			1	μs		83
USB operating voltage	VDD	3		3.6	V		83
Differential common-mode range	VCM	0.8		2.5	V	包含 VDI范围	83
Single-ended receiver threshold	VSE	1.3		2	V		83
Static output low level	VOL			0.3	V	1.5kΩ的 RL接至 3.6V	83
Static output high level	VOH	2.8		3.6	V	15kΩ的 RL接至 VSS	83
USB full-speed rise time	tr	4		20	ns	CL ≤ 50pF	84
USB full-speed fall time	tf	4		20	ns	CL ≤ 50pF	84
Rise/fall time matching tr/tf	trfm	90		110	%		84
Output signal crossover voltage	VCRS	1.3		2	V		84
ADC supply voltage	VDDA	2.4		3.6	V		84
ADC positive reference voltage	VREF+	2.4			V		84
Current into VREF input pin	IVREF		160	220	μA		84
ADC clock frequency	fADC	0.6		14	MHz		84
ADC sampling rate	fS	0.05		1	MHz		84
External trigger frequency	fTRIG			823	kHz	fADC=14MHz	84
External trigger frequency	fTRIG			17	1/fADC		84
Conversion voltage range lower bound	VAIN	0			V	VSSA或 VREF-连接到地	84
Sampling switch resistance	RADC			1	kΩ		84
Sampling time	tS	0.107		17.1	μs	fADC=14MHz	85
Sampling time	tS	1.5		239.5	1/fADC		85
ADC power-up time	tSTAB	0	0	1	μs		85
Total conversion time including sampling	tCONV	1		18	μs	fADC=14MHz	85
Total conversion time including sampling	tCONV	14		252	1/fADC	采样 tS+逐步逼近 12.5	85
Maximum external input impedance RAIN	RAIN			1.2	kΩ	fADC=14MHz, TS=1.5 周期 (tS=0.11 μs)	85
Maximum external input impedance RAIN	RAIN			10	kΩ	fADC=14MHz, TS=7.5 周期 (tS=0.54 μs)	85
Maximum external input impedance RAIN	RAIN			19	kΩ	fADC=14MHz, TS=13.5 周期 (tS=0.96 μs)	85
Maximum external input impedance RAIN	RAIN			41	kΩ	fADC=14MHz, TS=28.5 周期 (tS=2.04 μs)	85
Maximum external input impedance RAIN	RAIN			60	kΩ	fADC=14MHz, TS=41.5 周期 (tS=2.96 μs)	85
Maximum external input impedance RAIN	RAIN			80	kΩ	fADC=14MHz, TS=55.5 周期 (tS=3.96 μs)	85
Maximum external input impedance RAIN	RAIN			104	kΩ	fADC=14MHz, TS=71.5 周期 (tS=5.11 μs)	85
Maximum external input impedance RAIN	RAIN			350	kΩ	fADC=14MHz, TS=239.5 周期 (tS=17.1 μs)	85
Total unadjusted error	ET	-2	1.3	2	LSB	fPCLK2 = 56 MHz, fADC = 14 MHz, RAIN< 10 kΩ, VDDA = 3~3.6V, TA= 25 °C, VREF+=VDDA	85
Offset error	EO	-1.5	1	1.5	LSB		85
Gain error	EG	-1.5	0.5	1.5	LSB		85
Differential linearity error	ED	-1	0.7	1	LSB		85
Integral linearity error	EL	-1.5	0.8	1.5	LSB		85

CAD (KiCad official)

Symbol: CKS32F103RCT6
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: cks32f103rct6-etched.step / cks32f103rct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cks32f103rct6.step / cks32f103rct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: CKS datasheet (98 pp, sha256 3b7626fd9350b985, retrieved 2026-11-05, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

CKS32F103RCT6

Verified CKS32F103RCT6

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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