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CKS32F051K8T6
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CKS Other Processors and Microcontrollers (MCUs), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCKS32F051K8T6
CKS · Other Processors and Microcontrollers (MCUs) · LQFP-32(7x7)
CKS32F051K8T6 from CKS, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Digital power supply for I/O and the internal regulator, 2.0 V to 3.6 V. |
| 2 | PF0-OSC_IN | bidirectional | 5 V tolerant (FT) GPIO PF0 that doubles as the OSC_IN input for the 4-32 MHz external crystal or resonator. |
| 3 | PF1-OSC_OUT | bidirectional | 5 V tolerant (FT) GPIO PF1 that doubles as the OSC_OUT output for the external crystal or resonator. |
| 4 | NRST | bidirectional | Active-low device reset input and internal reset output, with a weak internal pull-up (RPU 25 to 55 kΩ). |
| 5 | VDDA | power_in | Analog supply for the ADC, DAC, reset block and RC oscillators, 2.0 V to 3.6 V, must be greater than or equal to VDD (2.4 V minimum when ADC or DAC is used). |
| 6 | PA0 | bidirectional | 3.3 V tolerant TTa I/O with ADC_IN0, WKUP1 wake-up, USART2_CTS, TIM2_CH1_ETR and COMP1_OUT functions. |
| 7 | PA1 | bidirectional | 3.3 V tolerant TTa I/O with ADC_IN1, COMP1_INP, USART2_RTS, TIM2_CH2, TSC_G1_IO2 and EVENTOUT functions. |
| 8 | PA2 | bidirectional | 3.3 V tolerant TTa I/O with ADC_IN2, USART2_TX, TIM2_CH3, TIM15_CH1 and COMP2_OUT functions. |
| 9 | PA3 | bidirectional | 3.3 V tolerant TTa I/O with ADC_IN3, COMP2_INP, USART2_RX, TIM2_CH4 and TIM15_CH2 functions. |
| 10 | PA4 | bidirectional | 3.3 V tolerant TTa I/O with ADC_IN4, DAC1_OUT, SPI1_NSS/I2S1_WS, USART2_CK and TIM14_CH1 functions. |
| 11 | PA5 | bidirectional | 3.3 V tolerant TTa I/O with ADC_IN5, SPI1_SCK/I2S1_CK, CEC, TIM2_CH1_ETR and TSC_G2_IO2 functions. |
| 12 | PA6 | bidirectional | 3.3 V tolerant TTa I/O with ADC_IN6, SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1 and COMP1_OUT functions. |
| 13 | PA7 | bidirectional | 3.3 V tolerant TTa I/O with ADC_IN7, SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM17_CH1 and COMP2_OUT functions. |
| 14 | PB0 | bidirectional | 3.3 V tolerant TTa I/O with ADC_IN8, TIM3_CH3, TIM1_CH2N, TSC_G3_IO2 and EVENTOUT functions. |
| 15 | PB1 | bidirectional | 3.3 V tolerant TTa I/O with ADC_IN9, TIM3_CH4, TIM14_CH1, TIM1_CH3N and TSC_G3_IO3 functions. |
| 16 | VSS | power_in | Digital ground, 0 V reference for VDD. |
| 17 | VDD | power_in | Digital power supply for I/O and the internal regulator, 2.0 V to 3.6 V. |
| 18 | PA8 | bidirectional | 5 V tolerant (FT) I/O with USART1_CK, TIM1_CH1, EVENTOUT and MCO functions. |
| 19 | PA9 | bidirectional | 5 V tolerant (FT) I/O with USART1_TX, TIM1_CH2, TIM15_BKIN and TSC_G4_IO1 functions. |
| 20 | PA10 | bidirectional | 5 V tolerant (FT) I/O with USART1_RX, TIM1_CH3, TIM17_BKIN and TSC_G4_IO2 functions. |
| 21 | PA11 | bidirectional | 5 V tolerant (FT) I/O with USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3 and EVENTOUT functions. |
| 22 | PA12 | bidirectional | 5 V tolerant (FT) I/O with USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4 and EVENTOUT functions. |
| 23 | PA13 | bidirectional | 5 V tolerant (FT) I/O that carries the SWDAT serial-wire debug data function after reset, with IR_OUT as an alternate function. |
| 24 | PA14 | bidirectional | 5 V tolerant (FT) I/O that carries the SWCLK serial-wire debug clock function after reset, with USART2_TX as an alternate function. |
| 25 | PA15 | bidirectional | 5 V tolerant (FT) I/O with SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR and EVENTOUT functions. |
| 26 | PB3 | bidirectional | 5 V tolerant (FT) I/O with SPI1_SCK/I2S1_CK, TIM2_CH2, TSC_G5_IO1 and EVENTOUT functions. |
| 27 | PB4 | bidirectional | 5 V tolerant (FT) I/O with SPI1_MISO/I2S1_MCK, TIM3_CH1, TSC_G5_IO2 and EVENTOUT functions. |
| 28 | PB5 | bidirectional | 5 V tolerant (FT) I/O with SPI1_MOSI/I2S1_SD, I2C1_SMBA, TIM16_BKIN and TIM3_CH2 functions. |
| 29 | PB6 | bidirectional | 5 V tolerant FTf I/O with I2C1_SCL (Fm+ capable), USART1_TX, TIM16_CH1N and TSC_G5_IO3 functions. |
| 30 | PB7 | bidirectional | 5 V tolerant FTf I/O with I2C1_SDA (Fm+ capable), USART1_RX, TIM17_CH1N and TSC_G5_IO4 functions. |
| 31 | BOOT0 | input | Dedicated boot memory select input, 0 V to 5.5 V, which must be externally pulled high or low and must not be left floating. |
| 32 | VSS | power_in | Digital ground, 0 V reference for VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CKS |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
CAD (KiCad official)
- Symbol:
CKS32F051K8T6 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
cks32f051k8t6-etched.step/cks32f051k8t6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cks32f051k8t6.step/cks32f051k8t6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: CKS datasheet (91 pp, sha256
e733607a3ed17f59, retrieved 2026-11-02, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).