CKS32F051C8T6

@@ -0,0 +1,119 @@+# CKS32F051C8T6++**CKS** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)++CKS32F051C8T6 from CKS, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup supply for RTC, external 32 kHz oscillator and backup registers when VDD is off. 1.65-3.6 V. |+| 2 | PC13 | bidirectional | Standard 3.3 V I/O (TC). Additional functions: RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2. Supplied via the VBAT switch - limited to 2 MHz / 30 pF, cannot source LED current. |+| 3 | PC14/OSC32_IN | bidirectional | Standard 3.3 V I/O (TC) muxed with the 32.768 kHz LSE oscillator input (OSC32_IN). Supplied via the VBAT switch with the same 2 MHz / 30 pF drive limits as PC13. |+| 4 | PC15/OSC32_OUT | bidirectional | Standard 3.3 V I/O (TC) muxed with the 32.768 kHz LSE oscillator output (OSC32_OUT). Backup-domain pin with 2 MHz / 30 pF drive limits. |+| 5 | PF0/OSC_IN | bidirectional | 5 V-tolerant I/O (FT) muxed with the HSE main crystal oscillator input (OSC_IN, 4-32 MHz). |+| 6 | PF1/OSC_OUT | bidirectional | 5 V-tolerant I/O (FT) muxed with the HSE main crystal oscillator output (OSC_OUT). |+| 7 | NRST | bidirectional | Bidirectional device reset (RST, active low) with internal weak pull-up. Asserted externally to reset the MCU, driven low internally on any internal reset source. |+| 8 | VSSA | power_in | Analog ground reference for ADC, DAC, reset block, RC oscillators and PLL. Tie to VSS on the board. |+| 9 | VDDA | power_in | Analog supply 2.0-3.6 V (min 2.4 V when ADC or DAC is used). Must be ≥ VDD and powered before VDD. |+| 10 | PA0 | bidirectional | 3.3 V I/O direct-to-ADC (TTa). AF: USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, TSC_G1_IO1. Additional: ADC_IN0, COMP1_INM6, RTC_TAMP2, WKUP1. |+| 11 | PA1 | bidirectional | 3.3 V I/O direct-to-ADC (TTa). AF: USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT. Additional: ADC_IN1, COMP1_INP. |+| 12 | PA2 | bidirectional | 3.3 V I/O direct-to-ADC (TTa). AF: USART2_TX, TIM2_CH3, TIM15_CH1, COMP2_OUT, TSC_G1_IO3. Additional: ADC_IN2, COMP2_INM6. |+| 13 | PA3 | bidirectional | 3.3 V I/O direct-to-ADC (TTa). AF: USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4. Additional: ADC_IN3, COMP2_INP. |+| 14 | PA4 | bidirectional | 3.3 V I/O direct-to-ADC (TTa). AF: SPI1_NSS/I2S1_WS, USART2_CK, TIM14_CH1, TSC_G2_IO1. Additional: ADC_IN4, COMP1_INM4, COMP2_INM4, DAC1_OUT. |+| 15 | PA5 | bidirectional | 3.3 V I/O direct-to-ADC (TTa). AF: SPI1_SCK/I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2. Additional: ADC_IN5, COMP1_INM5, COMP2_INM5. |+| 16 | PA6 | bidirectional | 3.3 V I/O direct-to-ADC (TTa). AF: SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT. Additional: ADC_IN6. |+| 17 | PA7 | bidirectional | 3.3 V I/O direct-to-ADC (TTa). AF: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT. Additional: ADC_IN7. |+| 18 | PB0 | bidirectional | 3.3 V I/O direct-to-ADC (TTa). AF: TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT. Additional: ADC_IN8. |+| 19 | PB1 | bidirectional | 3.3 V I/O direct-to-ADC (TTa). AF: TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3. Additional: ADC_IN9. |+| 20 | PB2 | bidirectional | 5 V-tolerant I/O (FT). AF: TSC_G3_IO4. |+| 21 | PB10 | bidirectional | 5 V-tolerant I/O (FT). AF: I2C2_SCL, CEC, TIM2_CH3, TSC_SYNC. |+| 22 | PB11 | bidirectional | 5 V-tolerant I/O (FT). AF: I2C2_SDA, TIM2_CH4, TSC_G6_IO1, EVENTOUT. |+| 23 | VSS | power_in | Digital ground. |+| 24 | VDD | power_in | Digital supply 2.0-3.6 V. |+| 25 | PB12 | bidirectional | 5 V-tolerant I/O (FT). AF: SPI2_NSS, TIM1_BKIN, TSC_G6_IO2, EVENTOUT. |+| 26 | PB13 | bidirectional | 5 V-tolerant I/O (FT). AF: SPI2_SCK, TIM1_CH1N, TSC_G6_IO3. |+| 27 | PB14 | bidirectional | 5 V-tolerant I/O (FT). AF: SPI2_MISO, TIM1_CH2N, TIM15_CH1, TSC_G6_IO4. |+| 28 | PB15 | bidirectional | 5 V-tolerant I/O (FT). AF: SPI2_MOSI, TIM1_CH3N, TIM15_CH1N, TIM15_CH2. Additional: RTC_REFIN. |+| 29 | PA8 | bidirectional | 5 V-tolerant I/O (FT). AF: USART1_CK, TIM1_CH1, EVENTOUT, MCO. |+| 30 | PA9 | bidirectional | 5 V-tolerant I/O (FT). AF: USART1_TX, TIM1_CH2, TIM15_BKIN, TSC_G4_IO1. |+| 31 | PA10 | bidirectional | 5 V-tolerant I/O (FT). AF: USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2. |+| 32 | PA11 | bidirectional | 5 V-tolerant I/O (FT). AF: USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3, EVENTOUT. |+| 33 | PA12 | bidirectional | 5 V-tolerant I/O (FT). AF: USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT. |+| 34 | PA13/SWDIO | bidirectional | 5 V-tolerant I/O (FT). Configured as SWDAT (SWDIO) after reset with internal pull-up. AF: IR_OUT, SWDAT. |+| 35 | PF6 | bidirectional | 5 V-tolerant I/O (FT). AF: I2C2_SCL. |+| 36 | PF7 | bidirectional | 5 V-tolerant I/O (FT). AF: I2C2_SDA. |+| 37 | PA14/SWCLK | bidirectional | 5 V-tolerant I/O (FT). Configured as SWCLK after reset with internal pull-down. AF: USART2_TX, SWCLK. |+| 38 | PA15 | bidirectional | 5 V-tolerant I/O (FT). AF: SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT. |+| 39 | PB3 | bidirectional | 5 V-tolerant I/O (FT). AF: SPI1_SCK/I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT. |+| 40 | PB4 | bidirectional | 5 V-tolerant I/O (FT). AF: SPI1_MISO/I2S1_MCK, TIM3_CH1, TSC_G5_IO2, EVENTOUT. |+| 41 | PB5 | bidirectional | 5 V-tolerant I/O (FT). AF: SPI1_MOSI/I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2. |+| 42 | PB6 | bidirectional | 5 V-tolerant I/O with Fast-Mode+ (FTf, 20 mA sink for I2C Fm+). AF: I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3. |+| 43 | PB7 | bidirectional | 5 V-tolerant I/O with Fast-Mode+ (FTf). AF: I2C1_SDA, USART1_RX, TIM17_CH1N, TSC_G5_IO4. |+| 44 | BOOT0 | input | Dedicated boot-mode select input (B). Sampled at reset with the option-byte boot bit to select boot from user Flash / system memory / SRAM. Must be tied through an external pull-up or pull-down; cannot be left floating. |+| 45 | PB8 | bidirectional | 5 V-tolerant I/O with Fast-Mode+ (FTf). AF: I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC. |+| 46 | PB9 | bidirectional | 5 V-tolerant I/O with Fast-Mode+ (FTf). AF: I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT. |+| 47 | VSS | power_in | Digital ground. |+| 48 | VDD | power_in | Digital supply 2.0-3.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | CKS |+| Package | LQFP-48(7x7) |+| Category | MCU |+| Pins | 48 |++## Ordering variants++Same part, different packaging or reel option.++- `CKS32F051C8T6`+- `CKS32F051C8T6C6T6`+- `CKS32F051C8T6C4T6`+- `CKS32F051C8T6C8T7`+- `CKS32F051C8T6C6T7`+- `CKS32F051C8T6C4T7`+- `CKS32F051C8T6C8U6`+- `CKS32F051C8T6C6U6`+- `CKS32F051C8T6C4U6`+- `CKS32F051C8T6C8U7`+- `CKS32F051C8T6C6U7`+- `CKS32F051C8T6C4U7`+- `CKS32F051C8T6R8T6`+- `CKS32F051C8T6R6T6`+- `CKS32F051C8T6R4T6`+- `CKS32F051C8T6R8T7`+- `CKS32F051C8T6R6T7`+- `CKS32F051C8T6R4T7`+- `CKS32F051C8T6K8T6`+- `CKS32F051C8T6K6T6`+- `CKS32F051C8T6K4T6`+- `CKS32F051C8T6K8T7`+- `CKS32F051C8T6K6T7`+- `CKS32F051C8T6K4T7`+- `CKS32F051C8T6K8U6`+- `CKS32F051C8T6K6U6`+- `CKS32F051C8T6K4U6`+- `CKS32F051C8T6K8U7`+- `CKS32F051C8T6K6U7`+- `CKS32F051C8T6K4U7`++## CAD (KiCad official)++- Symbol: `CKS32F051C8T6`+- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`+- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [CKS datasheet](docs/cks32f051c8t6-datasheet.pdf) (91 pp, sha256 `e733607a3ed17f59`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cks32f051c8t6-datasheet.pdf)